Name | Last modified | Size | Description | |
---|---|---|---|---|
Parent Directory | - | |||
lec4.pdf | 1998-09-22 08:14 | 42K | VHDL for Sequential Logic | |
lec7.pdf | 1998-10-01 01:14 | 188K | VHDL for Complex Designs | |
lec2.pdf | 1998-09-11 11:07 | 81K | VHDL for Combinational Logic Design | |
lec12.pdf | 1998-11-02 11:32 | 53K | Timing Analysis | |
lec15.pdf | 1998-11-12 22:20 | 16K | System Buses | |
midtermsol.pdf | 1998-10-26 09:31 | 77K | Solutions to Mid-Term | |
lec14.pdf | 1998-11-09 12:21 | 17K | Serial Interface | |
lec3.pdf | 1998-09-15 10:15 | 67K | Sequential Logic Design | |
lec8.pdf | 1998-10-06 08:54 | 404K | RTL Design | |
lec16.pdf | 1998-11-18 11:42 | 70K | Parallel Interfaces | |
lec10.pdf | 1998-10-18 21:47 | 92K | PC Interrupts and 8259 PIC | |
lec11.pdf | 1998-10-21 15:16 | 22K | Mid-Term Review | |
midterm.pdf | 1998-10-26 08:34 | 6.7K | Mid-Term Exam | |
lec18.pdf | 1998-11-25 18:44 | 15K | Metastability & Glitches | |
lec9.pdf | 1998-10-15 14:57 | 20K | Memory Devices and Systems | |
exam.pdf | 1999-04-13 17:11 | 77K | Final Exam | |
lec17.pdf | 1998-11-25 18:46 | 114K | DRAMs | |
lec13.pdf | 1998-11-06 12:25 | 13K | DMA | |
outline.pdf | 1998-09-10 22:42 | 66K | Course Outline | |
lec1.pdf | 1998-09-10 22:41 | 59K | Combinational Logic Design | |
lec5.pdf | 1998-09-22 08:15 | 168K | 386SX Processor Bus | |
lec6.pdf | 1998-09-24 00:52 | 93K | 80x86 Instruction Set | |