Ed Casas (edc@ece.ubc.ca) Tue, 28 Mar 2000 07:09:00 -0800
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Date: Tue, 28 Mar 2000 07:09:00 -0800 From: Ed Casas <edc@ece.ubc.ca> Subject: Re: assignemnt 5On Tue, Mar 28, 2000 at 09:25:46AM +0000, Po Wah Peter Lau wrote: > For question 1, do we need to draw the address decoder for our > design??? You don't need to draw a gate-level schematic. A block diagram is enough. The address decoder details will be in the VHDL code. -- Ed Casas edc@ece.ubc.ca http://casas.ece.ubc.ca +1 604 822-2592
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