Manuals >Reference >SPICE Simulators Print version of this Book (PDF file) |
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Circuit Model DescriptionsThe circuit description for the HSPICE and ELDO simulators is similar to the UCB SPICE simulator circuit description. The details in the following sections also apply to HSPICE and ELDO. Specifying Simulator OptionsFor information on available options and their syntax, refer to the User's Manual for that simulator. Simulator options are specified in the first line of the circuit definition using the following syntax: .OPTIONS OPT1 = OPTVAL1 OPT2 = OPTVAL2 ... OPTN = OPTVALN
A space is the only delimiter required between options. The nominal and operating temperatures, TNOM and TEMP, are commonly used options; they can also be specified by entering a value (in °C) for the global variables TNOM and TEMP. To do this, enter the variable and its value in the System Variables table in the Utilities application.
IC-CAP automatically adds the option POST=1 to the options list when the selected simulator is hspice. Specifying this option causes hspice to return the binary raw data file, which IC-CAP requires for reading back the simulated data. This option is not necessary when performing a Manual Simulation from the Simulation Debugger command menu because the data is not read back into IC-CAP. Describing the Device ModelA device model is used to characterize a single SPICE element of any type. This description requires 2 parts:
The general form of the element statement that calls the device model is: DNAME NNUM1 = NNAME1 NNUM2 = NNAME2 ...NNUMN = NNAMEN MNAME + DPAR1 = DVAL1 DPAR2 = DVAL2 ...DPARN = DVALN
A .MODEL definition specifies the parameters of a device model that describe a particular element. When a parameter is not specified, the default value in the model is used. The general form of the .MODEL definition is: .MODEL MNAME TYPE PNAME1=PVAL1 PNAME2=PVAL2 ...PNAMEN=PVALN
As in SPICE, a plus sign ( + ) that appears as the first character of a line denotes a continuation of the previous line. This continuation character is often used for easier readability when specifying the .MODEL card.
When using the SPECTRE simulator with either the OSI, SPECTRE442, or SPECTRE443 interfaces (see SPECTRE Interfaces), the LEVEL parameter for a MOS .MODEL card may not translate properly. IC-CAP outputs the value as a real number in the netlist, but SPECTRE requires an integer. To work around this issue, use the model type BSIM3 instead of MOS and omit the LEVEL parameter. Alternatively, enclose the LEVEL parameter with parentheses, for example, LEVEL = (11). By doing the later, IC-CAP does not flag it as a model parameter and leaves the expression alone when passing the netlist to SPECTRE.
Describing SubcircuitsA subcircuit model is used to describe a circuit that contains more than 1 element. The syntax is similar to the syntax in SPICE. The subcircuit description must begin with a .SUBCKT and end with a .ENDS declaration. Statements between these 2 declarations describe the subcircuit components. The general form of the first line of a subcircuit definition is: .SUBCKT SUBNAME NNUM1 = NNAME1 NNUM2 = NNAME2 ...NNUMN = NNAMEN + (PAR1=PARVAL1 PAR2=PARVAL2 ...PARN=PARVALN)
(While the syntax shown here is correct, passed parameters are ignored by IC-CAP.) The body of the subcircuit model description contains the components of the subcircuit using element and .MODEL statements. Assigning Node NamesIC-CAP allows the option of equating node numbers to node names in circuit descriptions because it is typically easier to refer to a node by a meaningful name rather than a number. If node numbers only are specified, these node numbers must be used when specifying inputs and outputs. Node identities can also be specified with the format %<name>. For example: Q1 1=C 2=B 3=E 4=S NPN or Q1 %C %B %E %S NPN Although HSPICE and ELDO allow alphanumeric characters for node names, node numbers must still be associated with node names because IC-CAP parses HSPICE as a SPICE-type simulator. When using this format, all node names within the circuit or device must be referenced using the %[nodename] syntax. Test Circuits and Hierarchical SimulationWhen characterizing a circuit, it is often necessary to add circuitry around a circuit or device to model the actual measurement Setup. IC-CAP provides a Test Circuit Editor to allow modeling of this additional bias circuitry. Select the DUT from the DUT/Setup panel. Click the Test Circuit tab and enter the test circuit description in the same manner you would enter a Circuit Description. The test circuit definition should include a call to the device or subcircuit defined in the Circuit Editor, as well as the additional circuitry needed to model the external parasitics of the measurement Setup.
Subcircuit and device model specifications can be called from inside another Model. This enables you to perform hierarchical simulations to study a circuit at different levels. When making reference to another model, the model name must be used as it appears in the IC-CAP Model List. For example, assume you have defined 3 Models, model1, model2, and model3. model1 has a circuit model description that is a device definition. The circuit model description for model2 is a subcircuit definition at the gate level that includes a call to model1 in a device call statement. And, the circuit model description for model3 is a subcircuit definition that includes a call to model2 in a subcircuit call statement. When you simulate a Setup in model3, IC-CAP traverses the Model hierarchy and uses the circuit model description defined in model3, which includes calls to model1 and model2. The syntax for calling a device model is identical to that described in the Device Model Description section. The general form of the device call is: DNAME NNUM1 = NNAME1 NNUM2 = NNAME2 ...NNUMN = NNAMEN MNAME + DPAR1 = DVAL1 DPAR2 = DVAL2 ...DPARN = DVALN Calling a subcircuit specification allows you to insert an entire subcircuit into a circuit as if it were a single component. The call requires a syntax identical to that used in SPICE. The general form of the subcircuit call is: XNAME NNUM1 NNUM2 ...NNUMN SUBNAME (PARVAL1 PARVAL2 ... PARVALN)
(While the syntax shown here is correct, passed parameters are ignored by IC-CAP.)
When a test circuit is included in the Model, IC-CAP uses the test circuit description as the top level circuit definition. The node number connections defined in the test circuit description, not the circuit description, are used as the external nodes. Because of this, any node-number-to-node-name cross-referencing in the circuit description is not used. Only node names equated to node numbers in the test circuit description can be used when specifying Inputs and Outputs in the Setup Editor. When only node numbers are specified in the test circuit description, (that is, they are not equated to node names) these same node numbers must be used in the Input and Output node fields.
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