Manuals >Nonlinear Device Models Volume 2 >VBIC Model
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References

  1   VBIC95: An Improved Vertical, IC Bipolar Transistor Model. Colin McAndrew, AT&T/Motorola; Jerry Seitchik, Texas Instruments; Derek Bowers, Analog Devices; Mark Dunn, Hewlett-Packard; Mark Foisy, Motorola; IanGetreu, Analogy; Marc McSwain, MetaSoftware; Shahriar Moinian, AT&T Bell Laboratories; James Parker, National Semiconductor; Paul van Wijnen, Intel/Philips; Larry Wagner, IBM.

  2   Avalanche Multiplication in a Compact Bipolar Transistor Model for Circuit Simulation. W.J. Kloosterman and H.C de Graaff. IEEE 1988 BCTM.

  3   Spice Early Model. McAndrew and Nagel. IEEE 1994 BCTM.

  4   A Survey of DC Methods for Determining the Series Resistance of Bipolar Transistors Including the New Delta ISub Method. Jorg Berkner, SMI System Microelectronic Innovation GmbH, Frankfurt/Oder, Germany.

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