vpr/SRC/base/globals.h File Reference

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Variables
int	nx
int	ny
struct s_grid_tile **	grid
char *	OutFilePrefix
char *	blif_circuit_name
float	grid_logic_tile_area
float	ipin_mux_trans_size
struct s_linked_vptr *	circuit_p_io_removed
int	num_luts
int	num_latches
int	num_subckts
int *	chan_width_x
int *	chan_width_y
struct s_trace **	trace_head
struct s_trace **	trace_tail
t_tnode *	tnode
int	num_tnodes
float	pb_max_internal_delay
const t_pb_type *	pbtype_max_internal_delay
int	num_nets
struct s_net *	clb_net
int	num_blocks
struct s_block *	block
t_type_ptr	IO_TYPE
t_type_ptr	EMPTY_TYPE
t_type_ptr	FILL_TYPE
int	num_types
struct s_type_descriptor *	type_descriptors
int	num_logical_nets
int	num_logical_blocks
int	num_saved_logical_blocks
int	num_saved_logical_nets
int	num_p_inputs
int	num_p_outputs
struct s_net *	vpack_net
struct s_net *	saved_logical_nets
struct s_logical_block *	logical_block
struct s_logical_block *	saved_logical_blocks
struct s_subckt *	subckt
int *	clb_to_vpack_net_mapping
int *	vpack_to_clb_net_mapping
int	num_rr_nodes
t_rr_node *	rr_node
int	num_rr_indexed_data
t_rr_indexed_data *	rr_indexed_data
t_ivec ***	rr_node_indices
int **	net_rr_terminals
struct s_switch_inf *	switch_inf
int **	rr_blk_source

---

Variable Documentation

char* blif_circuit_name

Name of the blif circuit

Definition at line 41 of file main.c.

struct s_block* block

blocks in the user netlist

Definition at line 5 of file globals_declare.h.

int* chan_width_x

chan_width_x is the x-directed channel; i.e. between rows. numerical form

chan_width_x is the x-directed channel; i.e. between rows

[0..ny]

Definition at line 14 of file globals_declare.h.

int * chan_width_y

numerical form

[0..nx]

Definition at line 14 of file globals_declare.h.

struct s_linked_vptr* circuit_p_io_removed

Primary inputs removed from circuit

primary inputs removed from circuit

Definition at line 115 of file main.c.

struct s_net* clb_net

external-to-complex block nets in the user netlist

Netlist to be placed stuff.

Definition at line 47 of file main.c.

int* clb_to_vpack_net_mapping

Relationship between external-to-complex block nets and internal-to-complex block nets. [0..num_clb_nets - 1]

[0..num_clb_nets - 1]

Definition at line 55 of file main.c.

t_type_ptr EMPTY_TYPE

Special pointers to identify special blocks on an FPGA: I/Os, unused, and default

Definition at line 63 of file main.c.

t_type_ptr FILL_TYPE

Special pointers to identify special blocks on an FPGA: I/Os, unused, and default

Definition at line 64 of file main.c.

struct s_grid_tile** grid

FPGA complex blocks grid [0..nx+1][0..ny+1]

[0..(nx+1)][0..(ny+1)] Physical block list

Definition at line 15 of file globals_declare.h.

float grid_logic_tile_area

Default area of a 1x1 logic tile (excludes routing) on the FPGA

Definition at line 32 of file main.c.

t_type_ptr IO_TYPE

Special pointers to identify special blocks on an FPGA: I/Os, unused, and default

Definition at line 62 of file main.c.

float ipin_mux_trans_size

Area of a mux transistor for the input connection block

Definition at line 33 of file main.c.

struct s_logical_block* logical_block

User netlist information

Definition at line 39 of file main.c.

int** net_rr_terminals

[0..num_nets-1][0..num_pins-1]

Gives the rr_node indices of net terminals. [0..num_nets-1][0..num_pins-1]

Definition at line 28 of file globals_declare.h.

int num_blocks

blocks in the user netlist

Definition at line 3 of file globals_declare.h.

int num_latches

Definition at line 37 of file main.c.

int num_logical_blocks

User netlist information

Definition at line 36 of file main.c.

int num_logical_nets

User netlist information

Definition at line 36 of file main.c.

int num_luts

Number in original netlist, before FF packing.

Definition at line 37 of file main.c.

int num_nets

external-to-complex block nets in the user netlist

Netlist to be placed stuff.

Definition at line 3 of file globals_declare.h.

int num_p_inputs

User netlist information

Definition at line 37 of file main.c.

int num_p_outputs

User netlist information

Definition at line 37 of file main.c.

int num_rr_indexed_data

Structures to define the routing architecture of the FPGA.

Definition at line 26 of file globals_declare.h.

int num_rr_nodes

Structures to define the routing architecture of the FPGA.

Definition at line 23 of file globals_declare.h.

int num_saved_logical_blocks

User netlist information

Definition at line 36 of file main.c.

int num_saved_logical_nets

User netlist information

Definition at line 36 of file main.c.

int num_subckts

Definition at line 36 of file main.c.

int num_tnodes

Number of nodes (pins) in the timing graph

Definition at line 120 of file main.c.

int num_types

type_descriptors are blocks that can be moved by the placer such as: I/Os, CLBs, memories, multipliers, etc Different types of physical block are contained in type descriptors

Definition at line 59 of file main.c.

int nx

x and y dimensions of the FPGA itself, the core of the FPGA is from [1..nx][1..ny], the I/Os form a perimeter surrounding the core

Physical FPGA architecture stuff

Definition at line 10 of file globals_declare.h.

int ny

Definition at line 10 of file globals_declare.h.

char* OutFilePrefix

Default prefix string for output files

Definition at line 18 of file util.c.

float pb_max_internal_delay

biggest internal delay of block

biggest internal delay of physical block

Definition at line 121 of file main.c.

const t_pb_type* pbtype_max_internal_delay

block type with highest internal delay

physical block type with highest internal delay

Definition at line 122 of file main.c.

int** rr_blk_source

[0..num_blocks-1][0..num_class-1]

Stores the SOURCE and SINK nodes of all CLBs (not valid for pads). [0..(num_blocks-1)][0..(num_class-1)]

Definition at line 30 of file globals_declare.h.

t_rr_indexed_data* rr_indexed_data

[0 .. num_rr_indexed_data-1]

[0..(num_rr_indexed_data-1)]

Definition at line 27 of file globals_declare.h.

t_rr_node* rr_node

[0..num_rr_nodes-1]

[0..(num_rr_nodes-1)]

Definition at line 24 of file globals_declare.h.

t_ivec*** rr_node_indices

Structures to define the routing architecture of the FPGA.

Definition at line 25 of file globals_declare.h.

struct s_logical_block * saved_logical_blocks

User netlist information

Definition at line 39 of file main.c.

struct s_net * saved_logical_nets

User netlist information

Definition at line 38 of file main.c.

struct s_subckt* subckt

User netlist information

Definition at line 40 of file main.c.

struct s_switch_inf* switch_inf

[0..det_routing_arch.num_switch-1]

Gives information about all the switch types (part of routing architecture, but loaded in read_arch.c [0..(det_routing_arch.num_switch-1)]

Definition at line 29 of file globals_declare.h.

t_tnode* tnode

[0..num_tnodes - 1]

Definition at line 119 of file main.c.

struct s_trace** trace_head

[0..num_nets-1] of linked list start pointers. Defines the routing.

Linked list start pointers. Define the routing. [0..(num_nets-1)]

Definition at line 19 of file globals_declare.h.

struct s_trace ** trace_tail

[0..(num_nets-1)]

Definition at line 19 of file globals_declare.h.

struct s_type_descriptor* type_descriptors

type_descriptors are blocks that can be moved by the placer such as: I/Os, CLBs, memories, multipliers, etc Different types of physical block are contained in type descriptors

Definition at line 60 of file main.c.

struct s_net* vpack_net

User netlist information

Definition at line 38 of file main.c.

int* vpack_to_clb_net_mapping

[0..num_vpack_nets - 1]

Definition at line 56 of file main.c.