Ed Casas (edc@ece.ubc.ca) Tue, 28 Mar 2000 07:43:18 -0800
- Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]
- New Message to:eece379@listhost.ece.ubc.ca
- Reply to:Re: # of words per chip
- Next message: Kelvin Ng: "Address range of the RAM system in Q.1?"
- Previous message: Ed Casas: "Re: address decoder"
- In reply to: Carmen Lee: "address decoder"
Date: Tue, 28 Mar 2000 07:43:18 -0800 From: Ed Casas <edc@ece.ubc.ca> Subject: Re: # of words per chipOn Tue, Mar 28, 2000 at 09:12:10AM +0000, Po Wah Peter Lau wrote: > i am just not sure about the # of words in at RAM chip. > Is it supposed to be 2??? or 4?? A "word" is a group of bits that are treated as a unit. In general there is no fixed size for a "word" (although in some contexts there may be a default value -- often a "word" is taken to mean a "16-bit word"). In the design of memories the term "word" is used in a number of different ways. The size of a memory chip "word" is the memory chip width (B). The number of bits provided in parallel by the memory system is the memory system "word" width. In this assignment the 64k x 8 chips suppply 8-bit "words." However, the memory system supplies a 16-bit "word" to the CPU's 16-bit data bus. -- Ed Casas edc@ece.ubc.ca http://casas.ece.ubc.ca +1 604 822-2592
- Next message: Kelvin Ng: "Address range of the RAM system in Q.1?"
- Previous message: Ed Casas: "Re: address decoder"
- In reply to: Carmen Lee: "address decoder"