Re: ASS5

Ed Casas (edc@ece.ubc.ca) Sun, 26 Mar 2000 08:06:13 -0800 

Date: Sun, 26 Mar 2000 08:06:13 -0800
From: Ed Casas <edc@ece.ubc.ca>
Subject: Re: ASS5



On Sat, Mar 25, 2000 at 05:16:57PM -0800, ddowler wrote:

> Do we even need to use the BHE and BLE signals for the VHDL circuit in
> question 1?

Yes.

> The RAM chips have an even number of addresses on them (65536),
> so when selecting the address range for the chip select
> signals, won't Ao (BHE/BLE) always be a don't-care?

Yes, but you will need two chip select signals for each bank: one
for the low-order byte and one for the high-order byte.

With a 16-bit data bus BHE*/BLE* can actually indicate three
different accesses: LS byte only, MS byte only, or both bytes.
The ship select lines have to be set appropriately.

-- 
Ed Casas   edc@ece.ubc.ca   http://casas.ece.ubc.ca   +1 604 822-2592