Re: LAB 4

Ed Casas (edc@ece.ubc.ca) Wed, 1 Mar 2000 18:06:47 -0800 

Date: Wed, 1 Mar 2000 18:06:47 -0800
From: Ed Casas <edc@ece.ubc.ca>
Subject: Re: LAB 4




> in the lab handout on page 2, the block diagram for "clock
> generator and controller" shows that state (and various other
> signal groups) is 4 bits wide.  why is this?  dont we only need
> 2 bits to encode the state?

There are 11 states so you need a minimum of log2(11) bits.

-- 
Ed Casas   edc@ece.ubc.ca   http://casas.ece.ubc.ca   +1 604 822-2592