in lab4, I have bus content.

SIMON SUN (sun.simon@usa.net) 29 Feb 00 13:56:54 PST 

Date: 29 Feb 00 13:56:54 PST
From: SIMON SUN <sun.simon@usa.net>
Subject: in lab4, I have bus content.



Hi,
I have a question about the lab4.
When I simulate the VHDL, I get bus content.
When I ior*=0, and address=220h, and idle status,
and ext_load=0. The data_bus ="00000001".
I got the result which is "0x".
I don't know why.
Thanks for help
Xin

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