SBC/FPGA

Shawn O'Neill (Shawn_ONeill@telus.net) Sun, 27 Feb 2000 11:26:15 -0800 

From: "Shawn O'Neill" <Shawn_ONeill@telus.net>
Subject: SBC/FPGA
Date: Sun, 27 Feb 2000 11:26:15 -0800



Hello,

I have a general quetion regarding the hardware in the lab.

For Lab#3 we dowloaded our machine code to the SBC and the VHDL code to the
FPGA to count up or down from 0 to 9. If you just dowloaded the assembly
code to the SBC and ran it without programming the FPGA you would get an
infinte loop outputting an asterix mark. Now once you programmed the FPGA
you could go back to the hyperterminal and see the numbers count up or down
and the program would stop after printing the number 9.

The question is: Why do you have to reprogram the FPGA every time the your
assembly language code ends????

With my code (and a few others I have seen) if you try to run your assembly
code again at this point (ie. after running the program successfully once)
it doesn't recognize any port input signal and starts the infinite loop of
asterixes again. So to get your program to work properly you have to use
this sequence of events avery time you want valid output:

	1. dl machine code to SBC
	2. run machine code -- starts infinte loop
	3. program FPGA
	4. return to hyperterminal to see valid output

Why can't it just be:

	1. dl machine code to SBC
	2. program FPGA
	3. run the machine code whenever you want and you get valid output as long
as the board is not reset or power is not turned off.

Any answers?????

Thanks, Shawn O'Neill