Biography, Service and CV
Tor Aamodt is a Professor in the Department of Electrical and Computer Engineering at the University of British Columbia where he has been a faculty member since 2006. His current research focuses on the architecture of graphics processor units (GPUs) and machine learning. Along with students in his research group he developed the widely used GPGPU-Sim simulator (and other offshoots). Three of his papers have been selected as "Top Picks" by IEEE Micro Magazine for their novelty and potential long term impact, a forth was selected as a "Top Picks" honorable mention. One of his papers was also selected as a "Research Highlight" in Communications of the ACM magazine. He is in the ISCA Hall of Fame, the MICRO Hall of Fame, and served as Program Co-Chair for MICRO 2019 and General Chair for ASPLOS 2023.
Tor received his BASc (in Engineering Science), MASc and PhD at the University of Toronto. Much of his PhD work was done while he was an intern at Intel's Microarchitecture Research Lab. Subsequently, he worked at NVIDIA on the memory system architecture ("framebuffer") of GeForce 8 Series GPU -- the first NVIDIA GPU to support CUDA. He was a Visiting Associate Professor in the Computer Science Department at Stanford University during 2012-2013. He has served as a consultant for Huawei and an expert for patent litigation related to GPUs and/or computer systems (non-infringement, invalidity, IPR).
Tor is a Professional Engineer in the province of British Columbia (registered with EGBC).
Service
Program Chair: ISPASS 2013, MICRO 2019
General Chair: ISPASS 2014, ASPLOS 2023
Program Committee member: ICML (2025, 2026), ICLR (2024, 2025, 2026), NeurIPS (2023, 2024, 2025), IEEE Micro Top Picks (2013, 2014, 2016, 2017, 2020, 2022 issue), ISCA (2013, 2016, 2018, 2020, 2022, 2023, 2024, 2026), MICRO (2010, 2011, 2012, 2015, 2020, 2021, 2022, 2023, 2026), HPCA (2012, 2013, 2016, 2022, 2023, 2024, 2025), ISPASS (2009, 2010, 2011, 2012, 2018, 2021, 2023), IISWC (2010, 2011, 2012, 2021), and others.