ADS Simulation Example

The circuit description is predefined for all IC-CAP configuration files. Enter this description if a new model is being defined; edit the description to fit specific needs. The syntax is identical to the syntax used for describing circuits in a typical ADS simulation deck.

This ADS simulation example will use the IC-CAP supplied Model hpsimnpn.mdl.

1	Choose File > Examples > model_files/bjt/hpsimnpn.mdl. Choose OK.

2	View the description by clicking the Circuit tab.

The circuit description is shown in the following figure. This deck describes the circuit (in this case, a single device) to be used in the simulation.

Figure 18 ADS Circuit Description Deck for an NPN Bipolar Transistor

; Simulation Input File for BJT options ascii=no model npnbjt BJT NPN=yes \ Is=401.5a Bf = 87.01 \ Nf = 995.5m Vaf = 84.56 \ Ikf = 11.95m Ise = 34.05f \ Ne = 1.594 Br = 10.79 \ Nr = 1.002 Var = 9.759 \ Ikr = 23.7m Isc = 1.095f \ Nc = 1.100 Rb = 9.117 \ Irb = 1.613m Rbm = 5.620 \ Re = 1.385 Rc = 9.292 \ Xtb = 1.7 Eg = 1.110 \ Xti = 3.000 Cje = 1.312p \ Vje = 1.110m Mje = 347.5m \ Tf = 52.74p Xtf = 5.625 \ Vtf = 2.678 Itf = 23.82 \ Ptf = 154.1 Cjc = 1.396p \ Vjc = 451.1m Mjc = 192.4m \ Xcjc = 300m Tr = 1.00n \ Cjs = 99.85f Vjs = 813.7m \ Mjs = 350.9m Fc = 500.0m \ Tnom = 27 npnbjt:Q1 C B E S

3	To view the input and output for the fearly setup, click the DUTs-Setups tab and select fearly.

The Measure/Simulate folder appears with the inputs vb, vc, ve, and vs, and the output ic. The vc input specifies a voltage source at node C that sweeps linearly from 0 to 5V in 21 steps. The ic output specifies that current at node C be monitored.

In the Plots folder, icvsvc is specified so that the results of the simulation can be viewed graphically.

4	To simulate, click the Simulate button in the Measure/Simulate folder. The Status line displays Simulate in progress. Under most configurations, the ADS status window will appear. For more information about these configurations, see Piped ADS Simulations.

When the simulation is complete, the Status line displays Simulate Complete.

5	To view the results of the simulation, right-click on fearly, then choose Plots > icvsvc. (This is a shortcut for displaying the plot from the Plots folder.) The plot displays measured data represented by solid lines and simulated data represented by dashed lines.

The Simulation Debugger

When using ADS with the Simulation Debugger to perform an IC-CAP simulation (as opposed to a manual simulation), an output text file consists of only the computational analysis information. An example of a typical AC analysis output text file is as follows:

HPEESOFSIM (ver. 03.00 -- 12/14/01 09:28:45) Copyright Agilent Technologies, 2004 CT ct1[1] </var/tmp/ICCAAa18727> VBGROUND.Vdc=(700 mV->720 mV) DC ct1[1].dc1[1/3] </var/tmp/ICCAAa18727> VBGROUND.Vdc=700 mV VCGROUND.Vdc=(0 V->5 V) DC ct1[1].dc1[2/3] </var/tmp/ICCAAa18727> VBGROUND.Vdc=710 mV VCGROUND.Vdc=(0 V->5 V) DC ct1[1].dc1[3/3] </var/tmp/ICCAAa18727> VBGROUND.Vdc=720 mV VCGROUND.Vdc=(0 V->5 V) ------------------- Simulation finished. -------------------

This file does not include the resulting data. To generate a more informative output text file, change the ASCII_Rawfile option in the Input File from ASCII_Rawfile=no to ASCII_Rawfile=yes and perform a manual simulation. An output text file that includes the simulated output data values is produced. The ASCII_Rawfile option is set to no by IC-CAP before every simulation so that the binary raw data file is generated by ADS. IC-CAP needs the binary raw data file to read the resulting simulation data. However, this data is not needed for a manual simulation.

ADS version 1.3 requires that the option UseNutmegFormat be set to yes to cause ADS to generate the binary raw data file required by IC-CAP. If the UseNutmegFormat option is not specified, the default is UseNutmegFormat = yes. If you set UseNutmegFormat = no, ADS will generate an output data format that IC-CAP cannot understand.