Circuit Model Description

This section discusses the circuit description for the Saber simulator.

Selecting Simulator Options

Saber simulation options are not specified in the circuit description, but rather in the analysis command line. Saber simulator options are set using the SABER_OPTIONS variable in the Setup, DUT or System variable tables.

Enter the options in the Value section of the variable exactly as they should appear in the Saber command string. For example, to perform a transient simulation from 0 to 0.8 nsec in 10 psec steps, the Saber command generated in IC-CAP is:

 tr(ts le-11, te 8e-10, tb 0)

To specify that all step sizes be fixed instead of variable, append the following option to the Saber command:

 steps fix

To do this in IC-CAP, specify the options command steps fix in the value field of the SABER_OPTIONS variable. Simulation now performs the following transient analysis command:

 tr(ts le-11, te 8e-10, tb 0, steps fix)

The SABER_OPTIONS variable can be specified in a variable table at any level. However, it is important to note that a SABER_OPTIONS variable specified in the DUT, Model or System variable tables is used by all simulations executed below that level. For example, if a SABER_OPTIONS variable is specified in the DUT variable table, every Setup under that DUT will use the specified option. This may result in simulation errors because 1 particular option may not be valid for every type of analysis being specified in the DUT.

Any number of options can be specified in the SABER_OPTIONS variable; they must be separated by a comma.

A Saber analysis in IC-CAP is always preceded by a DC operating point analysis. This DC command can also contain options and can be specified using the SABER_DC_OPTIONS variable.

Refer to Saber manuals for available options and corresponding syntax for each simulation type. Invalid options entered into the SABER_DC_OPTIONS and SABER_OPTIONS variables cause the simulation to fail.

Entering Circuit Descriptions

Circuit descriptions contain templates of devices and components, as well as node connections and model descriptions written in the MAST modeling language. All model parameter names must be specified when defining models. Circuit descriptions can also be read into the IC-CAP Circuit Editor from a file that already contains a description. You must enter circuit descriptions using valid model names and valid parameter names for the particular model being used.

Enter circuit descriptions for a Saber input deck with the Circuit Editor. IC-CAP contains a parser for descriptions written in the MAST modeling language.

There are 2 types of Saber circuit editor descriptions: devices and templates. Syntax rules for each type are described in the following sections.

Device Model Descriptions

A device model is used to characterize a single element of any type. This element can be predefined in the Saber library or defined by the user using the MAST modeling language.

A device model description requires a model definition written in the MAST modeling language and an element statement that calls a defined model.

A model description specifies the values of a device model that describes a particular element. When a parameter is not specified, the default value in the model template is used and the parameter does not appear in the IC-CAP Parameters table. The general form of the model definition is:

 ENAME..model MNAME = (PNAME1=PVAL1, PNAME2=PVAL2, 
...PNAMEX=PVALX)

where

ENAME is the name of the element template

MNAME is the user-specified name of the model being defined

PNAME is a parameter name for the particular model type

PVALs are the corresponding parameter values

The general form of the element statement that calls the device model is:

 ENAME.DNAME NNAME1 NNAME2 ...NNAMEN = model = MNAME, 
DPAR1 = DVAL1, DPAR2 = DVAL2 ...DPARN = DVALN

where

ENAME is the element template name

DNAME is the device name

NNAME specifies a node name

MNAME is the name of the model being referenced

DPAR is a predefined DUT parameter name

DVAL is the corresponding DUT parameter value

A sample element statement in the MAST modeling language is:

 q.qckt C B E S = model = sabernpn,AREA = 1.0 

where

q is the element template name defined in the Saber component library

qckt is the user-specified device name

C, B, E, and S are the node names

sabernpn is the model name. The model corresponding to this model name must be defined in the circuit description before the reference is made.

AREA is a DUT parameter of this model with an assigned value of 1.0

As in Saber, a line ending with a comma is continued on the next line.

Template Descriptions

A template is used to characterize a circuit that contains more than 1 device. The syntax for defining a template is identical to that of the MAST modeling language. A template can be defined as either an element template or a model template. The general form of the first line of a template element definition is:

 element template TEMPNAME NNAME1 NNAME2 ...NNAMEN = PAR1,
PAR2, ...PARN

where

TEMPNAME is the template name

NNAME is a node name of the external node of the template. External nodes are used to connect the template to another circuit.

PAR is the name of the parameter passed into the template

The general form of the first line of a template model definition is:

 element template TEMPNAME NNAME1 NNAME2 ...NNAMEN = model

where

TEMPNAME is the template name

NNAME is the node name of the external node of the template. External nodes are used to connect the template to another circuit.

The body of a model definition defines the model parameters. For more information on writing templates, refer to the Saber MAST Reference manual.

When writing a template for model development within IC-CAP, the recommended procedure is to define the template in an external file and include this file in the IC-CAP circuit description using the MAST nomenclature <filename> to include a file. This minimizes the changes to be made in the IC-CAP Circuit Description and thereby increases the rate of model development because changes in the external template file will immediately be recognized in IC-CAP.

Non-Numeric Parameter Values

Saber allows non-numeric values for a number of parameters in predefined templates. The MOS model parameter type is 1 example. This parameter can take on the value of _n for an nmos device and _p for a pmos device.

When a Saber input parameter is in alpha format, it does not appear in the IC-CAP Parameters table but is still present in the input deck and passed to the simulator for analysis.

Node Names

Saber accepts alphanumeric names as well as numbers to represent nodes. There is no limit to the number of characters allowed in a node name (the command line has a limit of 1024 characters).

Test Circuits and Hierarchical Simulations

When characterizing a circuit, it is often necessary to add circuitry around a circuit or device to model the actual measurement Setup. IC-CAP provides a Test Circuit Editor to allow modeling of this additional bias circuitry. Select the DUT from the DUT/Setup panel. Click the Test Circuit tab and enter the test circuit description in the same manner you would enter a Circuit Description. The test circuit definition should include a call to the device or template circuit defined in the Circuit Editor, as well as the additional circuitry needed to model the external parasitics of the measurement Setup.

Template circuit and device model specifications can be called from inside another Model. This allows you to perform hierarchical simulations to study a circuit at different levels. For example, assume you have defined 3 Models, model1, model2, and model3. Model1 has a circuit model description that is a device definition. The circuit model description for model2 is a template circuit definition at the gate level that includes a call to model1 in a device call statement. And, the circuit model description for model3 is a template circuit definition that includes a call to model2 in a subcircuit call statement. When you simulate a Setup in model3, IC-CAP traverses the Model hierarchy and uses the circuit model description defined in model3, which includes calls to model1 and model2. The syntax for calling a device model is identical to that described in the Device Model Specifications section above.

The general form of the device call is:

 ENAME.DNAME NNAME1 NNAME2 ...NNAMEN = model MNAME, 
DPAR1 = DPAR1, DPAR2 = DVAL2 ...DPARN = DVALN 

Calling a template specification allows you to insert an entire template into a circuit as if it were a single component. The call requires a syntax identical to that used in the MAST modeling language. The general form of the template element call is:

 TEMPNAME.TNAME NNAME1 NNAME2 ...NNAMEN = TPAR1 = TPARVAL1,
TPAR2 = TPARVAL2, ...TPARN = TPARVALN 

where

TEMPNAME is the name of the template previously described by a template definition. This template definition could exist in a different Model.

TNAME is the user specified name given to this particular instance of the template described by TEMPNAME.

NNAMEs represent the node names of the calling circuit that connect to the external nodes of the template. The calling circuit's node names need not be the same as the external nodes of the template. The order in which you specify these nodes is the order in which they are connected. The same number of nodes as declared in the template definition must be specified.

TPARs are predefined template parameter names. These parameters are defined in the template definition. TPARVALs are the corresponding values of the template parameters.

A hierarchical simulation, in which a template in 1 model references a device defined in a different model, requires the use of a MAST external declaration in the template definition. For example, assume a MOS device model (Saber template m named nmos2), which is called in the body of a circuit template called inverter in another model. This inverter template must include the following declaration in order for the nmos2 device model to be recognized.

 external m..model nmos2

The complete template for the inverter circuit is:

 template inv A B C D E F
electrical A, B, C, D, E, F
{
external m..model nmos2
m.minv A B C D = model = nmos2, l = 10u, w = 10u
m.mload E F A D = model = nmos2, l = 10u, w = 10u
} 

The external declaration does not need to be added when a template calls another template.

Refer to the Saber manuals for complete syntax and rules of the MAST modeling language.

Saber Libraries

The Saber library of components and templates includes the SPICE components as well as the components developed by Analogy, Inc. Refer to the Saber manuals for a list of supported simulator components, higher level templates and the required specification formats.

Saber Input Deck Comments

To indicate comments in the Saber simulator input deck, start an input line with the pound symbol (#). This denotes a comment in the circuit model description or in the input file of the Simulation Debugger.