Test Circuits

When measuring a single device or a complex circuit you often require additional components for biasing, setting operating points, or tuning the high-frequency performance characteristics. Even when no additional components are required, there may still be some parasitic elements introduced by the connections of the device to the instrumentation. Examples of this are DC resistance in probe-to-wafer contacts, inductances in IC package bond wires, and the shunt resistances in the bias ports of network analyzers. The Test Circuit in IC-CAP allows you to include these elements when performing a simulation or optimization without including them in the main circuit description or device model.

Syntax

A circuit editor is available for each DUT. To access it, select Edit in the DUT Circuit folder. This produces a window that has both the DUT Parameters table and the test circuit editor. The mechanics of using this editor are the same as using the circuit editor.

The test circuit adds another level of circuit hierarchy to the overall system being measured and modeled. It is implemented through a circuit description that uses the SPICE subcircuit syntax. The example test circuit shown in the following figure adds a capacitor and resistor to the outputs of the ECL logic gate described earlier.

Figure 219 Test Circuit for an ECL Logic Gate

* Resistive / Capacitive circuits to * simulate the effect of gate loading .SUBCKT gateload 1=IN1 2=IN2 3=OR + 4=NOR 5=VCC 6=VEE 7=VREF Xornor 1 2 3 4 5 6 7 ECLornor Cor 3 0 1p Ror 3 0 10MEG Cnor 4 0 1p Rnor 4 0 10MEG .ENDS

This test circuit is added to the SPICE circuit deck each time a simulation is called or when an optimization that uses a SPICE simulation is performed. It does not modify the original model description in any way. The values of the elements in the test circuit can be modified in the DUT Model Parameters.