Jason Yu's Unfinished Symphony

Education

University of British Columbia , Vancouver, B.C. (2005 - present)

Master of Applied Science, System-on-Chip Research Lab

Simon Fraser University , Burnaby , B.C. (1999-2005)

Bachelor of Applied Science, Electronics Engineering, First Class Honours

(Cumulative GPA of 4.03/4.33 at graduation)

 

Work Experience

Student Intern, Co-op Japan Program,

Advanced Telecommunications Research Institute International

Kyoto , Japan (June - Dec 2003)

Junior Hardware Designer, Sierra Wireless, Inc.,

Richmond , B.C., Canada (Fall 2001)

Product Design Engineer , PMC-Sierra, Inc. ,

Burnaby , B.C., Canada (Spring 2001)

 

Skills and Technical Experience

 

Embedded systems & digital RTL design on FPGA

Scalable Vector Soft-CPU on FPGA (Master Degree Research Project, 2006-present)

Three-Dimensional Ultrasound Image Processing System (2006)

Undergraduate Honours Thesis (Passed with distinction, 2004)

gImplementation of a Fast Algorithm for Multi-symbol Differential Detection of QPSKh

 

Deep-submicron transistor and integrated circuit modelling, analysis

CMOS gate-level design of CAM (2006)

Transistor-level design and layout of a 8-bit divider (2005)

 

C/C++ Programming

 

Matlab & DSP

 

Other Skills & Qualifications

 

Awards and Scholarships

 

Extracurricular Activities

Last updated Nov 2, 2008. Copyright © 2007 Jason Yu. All rights reserved.