Published at FPGA 2013, PDF.
Extended for TODAES, PDF (pre-print).
Quick-Trace implements the incremental signal-tracing techniques presented in
our FPGA'13 paper on the VPR6 CAD tool, part of the Verilog-To-Routing academic toolflow.
This was subsequently extended for the TODAES journal, where the key improvement
have been to extend the overlay network concept to triggering.
Quick-Trace v2.0 is supplied as a patch for VTR version 1.0:Unpack VTR (into the vtr_release/ directory), copy the patch file inside, and then apply the patch by typing:
The overlay network can be enabled using VTR's own ./run_vtr_flow.pl script,
which has been augmented with three new stages:
We would like to keep track of how many research groups are using this tool, so we would really appreciate it if you could fill out the following information: