#include "darInt.h"
Go to the source code of this file.
Functions | |
void | Dar_ManDefaultRwrParams (Dar_RwrPar_t *pPars) |
int | Dar_ManRewrite (Aig_Man_t *pAig, Dar_RwrPar_t *pPars) |
Aig_MmFixed_t * | Dar_ManComputeCuts (Aig_Man_t *pAig, int nCutsMax) |
Aig_MmFixed_t* Dar_ManComputeCuts | ( | Aig_Man_t * | pAig, | |
int | nCutsMax | |||
) |
Function*************************************************************
Synopsis []
Description []
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Definition at line 207 of file darCore.c.
00208 { 00209 Dar_Man_t * p; 00210 Dar_RwrPar_t Pars, * pPars = &Pars; 00211 Aig_Obj_t * pObj; 00212 Aig_MmFixed_t * pMemCuts; 00213 int i, nNodes; 00214 // remove dangling nodes 00215 if ( (nNodes = Aig_ManCleanup( pAig )) ) 00216 { 00217 // printf( "Removing %d nodes.\n", nNodes ); 00218 } 00219 // create default parameters 00220 Dar_ManDefaultRwrParams( pPars ); 00221 pPars->nCutsMax = nCutsMax; 00222 // create rewriting manager 00223 p = Dar_ManStart( pAig, pPars ); 00224 // set elementary cuts for the PIs 00225 Dar_ManCutsStart( p ); 00226 // compute cuts for each nodes in the topological order 00227 Aig_ManForEachNode( pAig, pObj, i ) 00228 Dar_ObjComputeCuts( p, pObj ); 00229 // free the cuts 00230 pMemCuts = p->pMemCuts; 00231 p->pMemCuts = NULL; 00232 // Dar_ManCutsFree( p ); 00233 // stop the rewriting manager 00234 Dar_ManStop( p ); 00235 return pMemCuts; 00236 }
void Dar_ManDefaultRwrParams | ( | Dar_RwrPar_t * | pPars | ) |
CFile****************************************************************
FileName [darCore.c]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [DAG-aware AIG rewriting.]
Synopsis [Core of the rewriting package.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - April 28, 2007.]
Revision [
] DECLARATIONS /// FUNCTION DEFINITIONS ///Function*************************************************************
Synopsis [Returns the structure with default assignment of parameters.]
Description []
SideEffects []
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Definition at line 42 of file darCore.c.
00043 { 00044 memset( pPars, 0, sizeof(Dar_RwrPar_t) ); 00045 pPars->nCutsMax = 8; // 8 00046 pPars->nSubgMax = 5; // 5 is a "magic number" 00047 pPars->fFanout = 1; 00048 pPars->fUpdateLevel = 0; 00049 pPars->fUseZeros = 0; 00050 pPars->fVerbose = 0; 00051 pPars->fVeryVerbose = 0; 00052 }
int Dar_ManRewrite | ( | Aig_Man_t * | pAig, | |
Dar_RwrPar_t * | pPars | |||
) |
Function*************************************************************
Synopsis []
Description []
SideEffects []
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Definition at line 65 of file darCore.c.
00066 { 00067 Dar_Man_t * p; 00068 // Bar_Progress_t * pProgress; 00069 Dar_Cut_t * pCut; 00070 Aig_Obj_t * pObj, * pObjNew; 00071 int i, k, nNodesOld, nNodeBefore, nNodeAfter, Required; 00072 int clk = 0, clkStart; 00073 // prepare the library 00074 Dar_LibPrepare( pPars->nSubgMax ); 00075 // create rewriting manager 00076 p = Dar_ManStart( pAig, pPars ); 00077 // remove dangling nodes 00078 Aig_ManCleanup( pAig ); 00079 // if updating levels is requested, start fanout and timing 00080 if ( p->pPars->fFanout ) 00081 Aig_ManFanoutStart( pAig ); 00082 if ( p->pPars->fUpdateLevel ) 00083 Aig_ManStartReverseLevels( pAig, 0 ); 00084 // set elementary cuts for the PIs 00085 Dar_ManCutsStart( p ); 00086 // resynthesize each node once 00087 clkStart = clock(); 00088 p->nNodesInit = Aig_ManNodeNum(pAig); 00089 nNodesOld = Vec_PtrSize( pAig->vObjs ); 00090 00091 // pProgress = Bar_ProgressStart( stdout, nNodesOld ); 00092 Aig_ManForEachObj( pAig, pObj, i ) 00093 // pProgress = Bar_ProgressStart( stdout, 100 ); 00094 // Aig_ManOrderStart( pAig ); 00095 // Aig_ManForEachNodeInOrder( pAig, pObj ) 00096 { 00097 // Bar_ProgressUpdate( pProgress, 100*pAig->nAndPrev/pAig->nAndTotal, NULL ); 00098 00099 // Bar_ProgressUpdate( pProgress, i, NULL ); 00100 if ( !Aig_ObjIsNode(pObj) ) 00101 continue; 00102 if ( i > nNodesOld ) 00103 break; 00104 00105 // consider freeing the cuts 00106 // if ( (i & 0xFFF) == 0 && Aig_MmFixedReadMemUsage(p->pMemCuts)/(1<<20) > 100 ) 00107 // Dar_ManCutsStart( p ); 00108 00109 // compute cuts for the node 00110 p->nNodesTried++; 00111 clk = clock(); 00112 Dar_ObjComputeCuts_rec( p, pObj ); 00113 p->timeCuts += clock() - clk; 00114 00115 // check if there is a trivial cut 00116 Dar_ObjForEachCut( pObj, pCut, k ) 00117 if ( pCut->nLeaves == 0 || (pCut->nLeaves == 1 && pCut->pLeaves[0] != pObj->Id && Aig_ManObj(p->pAig, pCut->pLeaves[0])) ) 00118 break; 00119 if ( k < (int)pObj->nCuts ) 00120 { 00121 assert( pCut->nLeaves < 2 ); 00122 if ( pCut->nLeaves == 0 ) // replace by constant 00123 { 00124 assert( pCut->uTruth == 0 || pCut->uTruth == 0xFFFF ); 00125 pObjNew = Aig_NotCond( Aig_ManConst1(p->pAig), pCut->uTruth==0 ); 00126 } 00127 else 00128 { 00129 assert( pCut->uTruth == 0xAAAA || pCut->uTruth == 0x5555 ); 00130 pObjNew = Aig_NotCond( Aig_ManObj(p->pAig, pCut->pLeaves[0]), pCut->uTruth==0x5555 ); 00131 } 00132 // remove the old cuts 00133 Dar_ObjSetCuts( pObj, NULL ); 00134 // replace the node 00135 Aig_ObjReplace( pAig, pObj, pObjNew, 1, p->pPars->fUpdateLevel ); 00136 continue; 00137 } 00138 00139 // evaluate the cuts 00140 p->GainBest = -1; 00141 Required = pAig->vLevelR? Aig_ObjRequiredLevel(pAig, pObj) : AIG_INFINITY; 00142 Dar_ObjForEachCut( pObj, pCut, k ) 00143 Dar_LibEval( p, pObj, pCut, Required ); 00144 // check the best gain 00145 if ( !(p->GainBest > 0 || (p->GainBest == 0 && p->pPars->fUseZeros)) ) 00146 { 00147 // Aig_ObjOrderAdvance( pAig ); 00148 continue; 00149 } 00150 // remove the old cuts 00151 Dar_ObjSetCuts( pObj, NULL ); 00152 // if we end up here, a rewriting step is accepted 00153 nNodeBefore = Aig_ManNodeNum( pAig ); 00154 pObjNew = Dar_LibBuildBest( p ); // pObjNew can be complemented! 00155 pObjNew = Aig_NotCond( pObjNew, Aig_ObjPhaseReal(pObjNew) ^ pObj->fPhase ); 00156 assert( (int)Aig_Regular(pObjNew)->Level <= Required ); 00157 // replace the node 00158 Aig_ObjReplace( pAig, pObj, pObjNew, 1, p->pPars->fUpdateLevel ); 00159 // compare the gains 00160 nNodeAfter = Aig_ManNodeNum( pAig ); 00161 assert( p->GainBest <= nNodeBefore - nNodeAfter ); 00162 // count gains of this class 00163 p->ClassGains[p->ClassBest] += nNodeBefore - nNodeAfter; 00164 } 00165 // Aig_ManOrderStop( pAig ); 00166 00167 p->timeTotal = clock() - clkStart; 00168 p->timeOther = p->timeTotal - p->timeCuts - p->timeEval; 00169 00170 // Bar_ProgressStop( pProgress ); 00171 p->nCutMemUsed = Aig_MmFixedReadMemUsage(p->pMemCuts)/(1<<20); 00172 Dar_ManCutsFree( p ); 00173 // put the nodes into the DFS order and reassign their IDs 00174 // Aig_NtkReassignIds( p ); 00175 // fix the levels 00176 // Aig_ManVerifyLevel( pAig ); 00177 if ( p->pPars->fFanout ) 00178 Aig_ManFanoutStop( pAig ); 00179 if ( p->pPars->fUpdateLevel ) 00180 { 00181 // Aig_ManVerifyReverseLevel( pAig ); 00182 Aig_ManStopReverseLevels( pAig ); 00183 } 00184 // stop the rewriting manager 00185 Dar_ManStop( p ); 00186 Aig_ManCheckPhase( pAig ); 00187 // check 00188 if ( !Aig_ManCheck( pAig ) ) 00189 { 00190 printf( "Aig_ManRewrite: The network check has failed.\n" ); 00191 return 0; 00192 } 00193 return 1; 00194 }