src/aig/aig/aig.h File Reference
#include <stdio.h>#include <stdlib.h>#include <string.h>#include <assert.h>#include <time.h>#include "vec.h"
Go to the source code of this file.
Define Documentation
| #define Aig_ManForEachAssert | ( | p, | |||
| pObj, | |||||
| i | ) | Vec_PtrForEachEntryStart( p->vPos, pObj, i, Aig_ManPoNum(p)-p->nAsserts ) |
| #define Aig_ManForEachLiLoSeq | ( | p, | |||
| pObjLi, | |||||
| pObjLo, | |||||
| k | ) |
for ( k = 0; (k < Aig_ManRegNum(p)) && (((pObjLi) = Aig_ManLi(p, k)), 1) \ && (((pObjLo)=Aig_ManLo(p, k)), 1); k++ )
| #define Aig_ManForEachLiSeq | ( | p, | |||
| pObj, | |||||
| i | ) | Vec_PtrForEachEntryStart( p->vPos, pObj, i, Aig_ManPoNum(p)-Aig_ManRegNum(p) ) |
| #define Aig_ManForEachLoSeq | ( | p, | |||
| pObj, | |||||
| i | ) | Vec_PtrForEachEntryStart( p->vPis, pObj, i, Aig_ManPiNum(p)-Aig_ManRegNum(p) ) |
| #define Aig_ManForEachNode | ( | p, | |||
| pObj, | |||||
| i | ) | Vec_PtrForEachEntry( p->vObjs, pObj, i ) if ( (pObj) == NULL || !Aig_ObjIsNode(pObj) ) {} else |
| #define Aig_ManForEachNodeInOrder | ( | p, | |||
| pObj | ) |
for ( assert(p->pOrderData), p->iPrev = 0, p->iNext = p->pOrderData[1]; \ p->iNext && (((pObj) = Aig_ManObj(p, p->iNext)), 1); \ p->iNext = p->pOrderData[2*p->iPrev+1] )
| #define Aig_ManForEachNodeVec | ( | p, | |||
| vIds, | |||||
| pObj, | |||||
| i | ) | for ( i = 0; i < Vec_IntSize(vIds) && ((pObj) = Aig_ManObj(p, Vec_IntEntry(vIds,i))); i++ ) |
| #define Aig_ManForEachObj | ( | p, | |||
| pObj, | |||||
| i | ) | Vec_PtrForEachEntry( p->vObjs, pObj, i ) if ( (pObj) == NULL ) {} else |
| #define Aig_ManForEachPi | ( | p, | |||
| pObj, | |||||
| i | ) | Vec_PtrForEachEntry( p->vPis, pObj, i ) |
| #define Aig_ManForEachPiSeq | ( | p, | |||
| pObj, | |||||
| i | ) | Vec_PtrForEachEntryStop( p->vPis, pObj, i, Aig_ManPiNum(p)-Aig_ManRegNum(p) ) |
| #define Aig_ManForEachPo | ( | p, | |||
| pObj, | |||||
| i | ) | Vec_PtrForEachEntry( p->vPos, pObj, i ) |
| #define Aig_ManForEachPoSeq | ( | p, | |||
| pObj, | |||||
| i | ) | Vec_PtrForEachEntryStop( p->vPos, pObj, i, Aig_ManPoNum(p)-Aig_ManRegNum(p) ) |
| #define AIG_MIN | ( | a, | |||
| b | ) | (((a) < (b))? (a) : (b)) |
| #define Aig_ObjForEachFanout | ( | p, | |||
| pObj, | |||||
| pFanout, | |||||
| iFan, | |||||
| i | ) |
for ( assert(p->pFanData), i = 0; (i < (int)(pObj)->nRefs) && \ (((iFan) = i? Aig_ObjFanoutNext(p, iFan) : Aig_ObjFanout0Int(p, pObj->Id)), 1) && \ (((pFanout) = Aig_ManObj(p, iFan>>1)), 1); i++ )
| #define PRT | ( | a, | |||
| t | ) | printf("%s = ", (a)); printf("%6.2f sec\n", (float)(t)/(float)(CLOCKS_PER_SEC)) |
Typedef Documentation
| typedef struct Aig_Man_t_ Aig_Man_t |
CFile****************************************************************
FileName [aig.h]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [AIG package.]
Synopsis [External declarations.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - April 28, 2007.]
Revision [
- Id
- aig.h,v 1.00 2007/04/28 00:00:00 alanmi Exp
] INCLUDES /// PARAMETERS /// BASIC TYPES ///
| typedef struct Aig_MmFixed_t_ Aig_MmFixed_t |
| typedef struct Aig_MmFlex_t_ Aig_MmFlex_t |
| typedef struct Aig_MmStep_t_ Aig_MmStep_t |
| typedef struct Aig_Obj_t_ Aig_Obj_t |
| typedef struct Aig_TMan_t_ Aig_TMan_t |
Enumeration Type Documentation
| enum Aig_Type_t |
- Enumerator:
AIG_OBJ_NONE AIG_OBJ_CONST1 AIG_OBJ_PI AIG_OBJ_PO AIG_OBJ_BUF AIG_OBJ_AND AIG_OBJ_EXOR AIG_OBJ_LATCH AIG_OBJ_VOID
Definition at line 56 of file aig.h.
00056 { 00057 AIG_OBJ_NONE, // 0: non-existent object 00058 AIG_OBJ_CONST1, // 1: constant 1 00059 AIG_OBJ_PI, // 2: primary input 00060 AIG_OBJ_PO, // 3: primary output 00061 AIG_OBJ_BUF, // 4: buffer node 00062 AIG_OBJ_AND, // 5: AND node 00063 AIG_OBJ_EXOR, // 6: EXOR node 00064 AIG_OBJ_LATCH, // 7: latch 00065 AIG_OBJ_VOID // 8: unused object 00066 } Aig_Type_t;
Function Documentation
Function*************************************************************
Synopsis [Performs canonicization step.]
Description [The argument nodes can be complemented.]
SideEffects []
SeeAlso []
Definition at line 138 of file aigOper.c.
00139 { 00140 Aig_Obj_t * pGhost, * pResult; 00141 // Aig_Obj_t * pFan0, * pFan1; 00142 // check trivial cases 00143 if ( p0 == p1 ) 00144 return p0; 00145 if ( p0 == Aig_Not(p1) ) 00146 return Aig_Not(p->pConst1); 00147 if ( Aig_Regular(p0) == p->pConst1 ) 00148 return p0 == p->pConst1 ? p1 : Aig_Not(p->pConst1); 00149 if ( Aig_Regular(p1) == p->pConst1 ) 00150 return p1 == p->pConst1 ? p0 : Aig_Not(p->pConst1); 00151 // check not so trivial cases 00152 if ( p->fAddStrash && (Aig_ObjIsNode(Aig_Regular(p0)) || Aig_ObjIsNode(Aig_Regular(p1))) ) 00153 { // http://fmv.jku.at/papers/BrummayerBiere-MEMICS06.pdf 00154 Aig_Obj_t * pFanA, * pFanB, * pFanC, * pFanD; 00155 pFanA = Aig_ObjChild0(Aig_Regular(p0)); 00156 pFanB = Aig_ObjChild1(Aig_Regular(p0)); 00157 pFanC = Aig_ObjChild0(Aig_Regular(p1)); 00158 pFanD = Aig_ObjChild1(Aig_Regular(p1)); 00159 if ( Aig_IsComplement(p0) ) 00160 { 00161 if ( pFanA == Aig_Not(p1) || pFanB == Aig_Not(p1) ) 00162 return p1; 00163 if ( pFanB == p1 ) 00164 return Aig_And( p, Aig_Not(pFanA), pFanB ); 00165 if ( pFanA == p1 ) 00166 return Aig_And( p, Aig_Not(pFanB), pFanA ); 00167 } 00168 else 00169 { 00170 if ( pFanA == Aig_Not(p1) || pFanB == Aig_Not(p1) ) 00171 return Aig_Not(p->pConst1); 00172 if ( pFanA == p1 || pFanB == p1 ) 00173 return p0; 00174 } 00175 if ( Aig_IsComplement(p1) ) 00176 { 00177 if ( pFanC == Aig_Not(p0) || pFanD == Aig_Not(p0) ) 00178 return p0; 00179 if ( pFanD == p0 ) 00180 return Aig_And( p, Aig_Not(pFanC), pFanD ); 00181 if ( pFanC == p0 ) 00182 return Aig_And( p, Aig_Not(pFanD), pFanC ); 00183 } 00184 else 00185 { 00186 if ( pFanC == Aig_Not(p0) || pFanD == Aig_Not(p0) ) 00187 return Aig_Not(p->pConst1); 00188 if ( pFanC == p0 || pFanD == p0 ) 00189 return p1; 00190 } 00191 if ( !Aig_IsComplement(p0) && !Aig_IsComplement(p1) ) 00192 { 00193 if ( pFanA == Aig_Not(pFanC) || pFanA == Aig_Not(pFanD) || pFanB == Aig_Not(pFanC) || pFanB == Aig_Not(pFanD) ) 00194 return Aig_Not(p->pConst1); 00195 if ( pFanA == pFanC || pFanB == pFanC ) 00196 return Aig_And( p, p0, pFanD ); 00197 if ( pFanB == pFanC || pFanB == pFanD ) 00198 return Aig_And( p, pFanA, p1 ); 00199 if ( pFanA == pFanD || pFanB == pFanD ) 00200 return Aig_And( p, p0, pFanC ); 00201 if ( pFanA == pFanC || pFanA == pFanD ) 00202 return Aig_And( p, pFanB, p1 ); 00203 } 00204 else if ( Aig_IsComplement(p0) && !Aig_IsComplement(p1) ) 00205 { 00206 if ( pFanA == Aig_Not(pFanC) || pFanA == Aig_Not(pFanD) || pFanB == Aig_Not(pFanC) || pFanB == Aig_Not(pFanD) ) 00207 return p1; 00208 if ( pFanB == pFanC || pFanB == pFanD ) 00209 return Aig_And( p, Aig_Not(pFanA), p1 ); 00210 if ( pFanA == pFanC || pFanA == pFanD ) 00211 return Aig_And( p, Aig_Not(pFanB), p1 ); 00212 } 00213 else if ( !Aig_IsComplement(p0) && Aig_IsComplement(p1) ) 00214 { 00215 if ( pFanC == Aig_Not(pFanA) || pFanC == Aig_Not(pFanB) || pFanD == Aig_Not(pFanA) || pFanD == Aig_Not(pFanB) ) 00216 return p0; 00217 if ( pFanD == pFanA || pFanD == pFanB ) 00218 return Aig_And( p, Aig_Not(pFanC), p0 ); 00219 if ( pFanC == pFanA || pFanC == pFanB ) 00220 return Aig_And( p, Aig_Not(pFanD), p0 ); 00221 } 00222 else // if ( Aig_IsComplement(p0) && Aig_IsComplement(p1) ) 00223 { 00224 if ( pFanA == pFanD && pFanB == Aig_Not(pFanC) ) 00225 return Aig_Not(pFanA); 00226 if ( pFanB == pFanC && pFanA == Aig_Not(pFanD) ) 00227 return Aig_Not(pFanB); 00228 if ( pFanA == pFanC && pFanB == Aig_Not(pFanD) ) 00229 return Aig_Not(pFanA); 00230 if ( pFanB == pFanD && pFanA == Aig_Not(pFanC) ) 00231 return Aig_Not(pFanB); 00232 } 00233 } 00234 // check if it can be an EXOR gate 00235 // if ( Aig_ObjIsExorType( p0, p1, &pFan0, &pFan1 ) ) 00236 // return Aig_Exor( p, pFan0, pFan1 ); 00237 pGhost = Aig_ObjCreateGhost( p, p0, p1, AIG_OBJ_AND ); 00238 pResult = Aig_CanonPair_rec( p, pGhost ); 00239 return pResult; 00240 }
| static int Aig_Base10Log | ( | unsigned | n | ) | [inline, static] |
| static int Aig_Base2Log | ( | unsigned | n | ) | [inline, static] |
| static int Aig_BitWordNum | ( | int | nBits | ) | [inline, static] |
Function*************************************************************
Synopsis [Composes the AIG (pRoot) with the function (pFunc) using PI var (iVar).]
Description []
SideEffects []
SeeAlso []
Definition at line 546 of file aigDfs.c.
00547 { 00548 // quit if the PI variable is not defined 00549 if ( iVar >= Aig_ManPiNum(p) ) 00550 { 00551 printf( "Aig_Compose(): The PI variable %d is not defined.\n", iVar ); 00552 return NULL; 00553 } 00554 // recursively perform composition 00555 Aig_Compose_rec( p, Aig_Regular(pRoot), pFunc, Aig_ManPi(p, iVar) ); 00556 // clear the markings 00557 Aig_ConeUnmark_rec( Aig_Regular(pRoot) ); 00558 return Aig_NotCond( Aig_Regular(pRoot)->pData, Aig_IsComplement(pRoot) ); 00559 }
| void Aig_ConeUnmark_rec | ( | Aig_Obj_t * | pObj | ) |
Function*************************************************************
Synopsis [Counts the number of AIG nodes rooted at this cone.]
Description []
SideEffects []
SeeAlso []
Definition at line 372 of file aigDfs.c.
00373 { 00374 assert( !Aig_IsComplement(pObj) ); 00375 if ( !Aig_ObjIsNode(pObj) || !Aig_ObjIsMarkA(pObj) ) 00376 return; 00377 Aig_ConeUnmark_rec( Aig_ObjFanin0(pObj) ); 00378 Aig_ConeUnmark_rec( Aig_ObjFanin1(pObj) ); 00379 assert( Aig_ObjIsMarkA(pObj) ); // loop detection 00380 Aig_ObjClearMarkA( pObj ); 00381 }
Function*************************************************************
Synopsis [Creates AND function with nVars inputs.]
Description []
SideEffects []
SeeAlso []
Definition at line 476 of file aigOper.c.
00477 { 00478 Aig_Obj_t * pFunc; 00479 int i; 00480 pFunc = Aig_ManConst1( p ); 00481 for ( i = 0; i < nVars; i++ ) 00482 pFunc = Aig_And( p, pFunc, Aig_IthVar(p, i) ); 00483 return pFunc; 00484 }
Function*************************************************************
Synopsis [Creates AND function with nVars inputs.]
Description []
SideEffects []
SeeAlso []
Definition at line 518 of file aigOper.c.
00519 { 00520 Aig_Obj_t * pFunc; 00521 int i; 00522 pFunc = Aig_ManConst0( p ); 00523 for ( i = 0; i < nVars; i++ ) 00524 pFunc = Aig_Exor( p, pFunc, Aig_IthVar(p, i) ); 00525 return pFunc; 00526 }
Function*************************************************************
Synopsis [Creates AND function with nVars inputs.]
Description []
SideEffects []
SeeAlso []
Definition at line 497 of file aigOper.c.
00498 { 00499 Aig_Obj_t * pFunc; 00500 int i; 00501 pFunc = Aig_ManConst0( p ); 00502 for ( i = 0; i < nVars; i++ ) 00503 pFunc = Aig_Or( p, pFunc, Aig_IthVar(p, i) ); 00504 return pFunc; 00505 }
| int Aig_DagSize | ( | Aig_Obj_t * | pObj | ) |
Function*************************************************************
Synopsis [Counts the number of AIG nodes rooted at this cone.]
Description []
SideEffects []
SeeAlso []
Definition at line 394 of file aigDfs.c.
00395 { 00396 int Counter; 00397 Counter = Aig_ConeCountAndMark_rec( Aig_Regular(pObj) ); 00398 Aig_ConeUnmark_rec( Aig_Regular(pObj) ); 00399 return Counter; 00400 }
Function*************************************************************
Synopsis [Performs canonicization step.]
Description [The argument nodes can be complemented.]
SideEffects []
SeeAlso []
Definition at line 274 of file aigOper.c.
00275 { 00276 /* 00277 Aig_Obj_t * pGhost, * pResult; 00278 // check trivial cases 00279 if ( p0 == p1 ) 00280 return Aig_Not(p->pConst1); 00281 if ( p0 == Aig_Not(p1) ) 00282 return p->pConst1; 00283 if ( Aig_Regular(p0) == p->pConst1 ) 00284 return Aig_NotCond( p1, p0 == p->pConst1 ); 00285 if ( Aig_Regular(p1) == p->pConst1 ) 00286 return Aig_NotCond( p0, p1 == p->pConst1 ); 00287 // check the table 00288 pGhost = Aig_ObjCreateGhost( p, p0, p1, AIG_OBJ_EXOR ); 00289 if ( pResult = Aig_TableLookup( p, pGhost ) ) 00290 return pResult; 00291 return Aig_ObjCreate( p, pGhost ); 00292 */ 00293 return Aig_Or( p, Aig_And(p, p0, Aig_Not(p1)), Aig_And(p, Aig_Not(p0), p1) ); 00294 }
| static int Aig_InfoHasBit | ( | unsigned * | p, | |
| int | i | |||
| ) | [inline, static] |
| static unsigned Aig_InfoMask | ( | int | nVar | ) | [inline, static] |
| static void Aig_InfoSetBit | ( | unsigned * | p, | |
| int | i | |||
| ) | [inline, static] |
| static void Aig_InfoXorBit | ( | unsigned * | p, | |
| int | i | |||
| ) | [inline, static] |
| static int Aig_IsComplement | ( | Aig_Obj_t * | p | ) | [inline, static] |
FUNCTION DEFINITIONS ///Function*************************************************************
Synopsis [Returns i-th elementary variable.]
Description []
SideEffects []
SeeAlso []
Definition at line 60 of file aigOper.c.
00061 { 00062 int v; 00063 for ( v = Aig_ManPiNum(p); v <= i; v++ ) 00064 Aig_ObjCreatePi( p ); 00065 assert( i < Vec_PtrSize(p->vPis) ); 00066 return Aig_ManPi( p, i ); 00067 }
Function*************************************************************
Synopsis [Creates the canonical form of the node.]
Description []
SideEffects []
SeeAlso []
Definition at line 253 of file aigOper.c.
00254 { 00255 Aig_Obj_t * pGhost, * pResult; 00256 pGhost = Aig_ObjCreateGhost( p, Aig_NotCond(pObj, fInitOne), NULL, AIG_OBJ_LATCH ); 00257 pResult = Aig_TableLookup( p, pGhost ); 00258 if ( pResult == NULL ) 00259 pResult = Aig_ObjCreate( p, pGhost ); 00260 return Aig_NotCond( pResult, fInitOne ); 00261 }
Function*************************************************************
Synopsis [Implements ITE operation.]
Description []
SideEffects []
SeeAlso []
| static int Aig_ManAndNum | ( | Aig_Man_t * | p | ) | [inline, static] |
Definition at line 187 of file aig.h.
00187 { return p->nObjs[AIG_OBJ_AND]; }
| static int Aig_ManBufNum | ( | Aig_Man_t * | p | ) | [inline, static] |
Definition at line 186 of file aig.h.
00186 { return p->nObjs[AIG_OBJ_BUF]; }
| int Aig_ManCheck | ( | Aig_Man_t * | p | ) |
FUNCTION DECLARATIONS ///
CFile****************************************************************
FileName [aigCheck.c]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [AIG package.]
Synopsis [AIG checking procedures.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - April 28, 2007.]
Revision [
- Id
- aigCheck.c,v 1.00 2007/04/28 00:00:00 alanmi Exp
] DECLARATIONS /// FUNCTION DEFINITIONS ///Function*************************************************************
Synopsis [Checks the consistency of the AIG manager.]
Description []
SideEffects []
SeeAlso []
Definition at line 42 of file aigCheck.c.
00043 { 00044 Aig_Obj_t * pObj, * pObj2; 00045 int i; 00046 // check primary inputs 00047 Aig_ManForEachPi( p, pObj, i ) 00048 { 00049 if ( Aig_ObjFanin0(pObj) || Aig_ObjFanin1(pObj) ) 00050 { 00051 printf( "Aig_ManCheck: The PI node \"%p\" has fanins.\n", pObj ); 00052 return 0; 00053 } 00054 } 00055 // check primary outputs 00056 Aig_ManForEachPo( p, pObj, i ) 00057 { 00058 if ( !Aig_ObjFanin0(pObj) ) 00059 { 00060 printf( "Aig_ManCheck: The PO node \"%p\" has NULL fanin.\n", pObj ); 00061 return 0; 00062 } 00063 if ( Aig_ObjFanin1(pObj) ) 00064 { 00065 printf( "Aig_ManCheck: The PO node \"%p\" has second fanin.\n", pObj ); 00066 return 0; 00067 } 00068 } 00069 // check internal nodes 00070 Aig_ManForEachObj( p, pObj, i ) 00071 { 00072 if ( !Aig_ObjIsNode(pObj) ) 00073 continue; 00074 if ( !Aig_ObjFanin0(pObj) || !Aig_ObjFanin1(pObj) ) 00075 { 00076 printf( "Aig_ManCheck: The AIG has internal node \"%p\" with a NULL fanin.\n", pObj ); 00077 return 0; 00078 } 00079 if ( Aig_ObjFanin0(pObj)->Id >= Aig_ObjFanin1(pObj)->Id ) 00080 { 00081 printf( "Aig_ManCheck: The AIG has node \"%p\" with a wrong ordering of fanins.\n", pObj ); 00082 return 0; 00083 } 00084 pObj2 = Aig_TableLookup( p, pObj ); 00085 if ( pObj2 != pObj ) 00086 { 00087 printf( "Aig_ManCheck: Node \"%p\" is not in the structural hashing table.\n", pObj ); 00088 return 0; 00089 } 00090 } 00091 // count the total number of nodes 00092 if ( Aig_ManObjNum(p) != 1 + Aig_ManPiNum(p) + Aig_ManPoNum(p) + 00093 Aig_ManBufNum(p) + Aig_ManAndNum(p) + Aig_ManExorNum(p) + Aig_ManLatchNum(p) ) 00094 { 00095 printf( "Aig_ManCheck: The number of created nodes is wrong.\n" ); 00096 printf( "C1 = %d. Pi = %d. Po = %d. Buf = %d. And = %d. Xor = %d. Lat = %d. Total = %d.\n", 00097 1, Aig_ManPiNum(p), Aig_ManPoNum(p), Aig_ManBufNum(p), Aig_ManAndNum(p), Aig_ManExorNum(p), Aig_ManLatchNum(p), 00098 1 + Aig_ManPiNum(p) + Aig_ManPoNum(p) + Aig_ManBufNum(p) + Aig_ManAndNum(p) + Aig_ManExorNum(p) + Aig_ManLatchNum(p) ); 00099 printf( "Created = %d. Deleted = %d. Existing = %d.\n", 00100 p->nCreated, p->nDeleted, p->nCreated - p->nDeleted ); 00101 return 0; 00102 } 00103 // count the number of nodes in the table 00104 if ( Aig_TableCountEntries(p) != Aig_ManAndNum(p) + Aig_ManExorNum(p) + Aig_ManLatchNum(p) ) 00105 { 00106 printf( "Aig_ManCheck: The number of nodes in the structural hashing table is wrong.\n" ); 00107 printf( "Entries = %d. And = %d. Xor = %d. Lat = %d. Total = %d.\n", 00108 Aig_TableCountEntries(p), Aig_ManAndNum(p), Aig_ManExorNum(p), Aig_ManLatchNum(p), 00109 Aig_ManAndNum(p) + Aig_ManExorNum(p) + Aig_ManLatchNum(p) ); 00110 00111 return 0; 00112 } 00113 // if ( !Aig_ManIsAcyclic(p) ) 00114 // return 0; 00115 return 1; 00116 }
| void Aig_ManCheckMarkA | ( | Aig_Man_t * | p | ) |
Function*************************************************************
Synopsis [Checks if the markA is reset.]
Description []
SideEffects []
SeeAlso []
Definition at line 129 of file aigCheck.c.
00130 { 00131 Aig_Obj_t * pObj; 00132 int i; 00133 Aig_ManForEachObj( p, pObj, i ) 00134 assert( pObj->fMarkA == 0 ); 00135 }
| void Aig_ManCheckPhase | ( | Aig_Man_t * | p | ) |
Function*************************************************************
Synopsis [Checks the consistency of phase assignment.]
Description []
SideEffects []
SeeAlso []
Definition at line 148 of file aigCheck.c.
00149 { 00150 Aig_Obj_t * pObj; 00151 int i; 00152 Aig_ManForEachObj( p, pObj, i ) 00153 if ( Aig_ObjIsPi(pObj) ) 00154 assert( (int)pObj->fPhase == 0 ); 00155 else 00156 assert( (int)pObj->fPhase == (Aig_ObjPhaseReal(Aig_ObjChild0(pObj)) & Aig_ObjPhaseReal(Aig_ObjChild1(pObj))) ); 00157 }
Function*************************************************************
Synopsis [Performs partitioned choice computation.]
Description [Assumes that each output in the second AIG cannot have more supp vars than the same output in the first AIG.]
SideEffects []
SeeAlso []
Definition at line 872 of file aigPart.c.
00873 { 00874 extern int Cmd_CommandExecute( void * pAbc, char * sCommand ); 00875 extern void * Abc_FrameGetGlobalFrame(); 00876 extern Aig_Man_t * Fra_FraigChoice( Aig_Man_t * pManAig, int nConfMax ); 00877 00878 Vec_Ptr_t * vOutsTotal, * vOuts; 00879 Aig_Man_t * pAigTotal, * pAigPart, * pAig; 00880 Vec_Int_t * vPart, * vPartSupp; 00881 Vec_Ptr_t * vParts; 00882 Aig_Obj_t * pObj; 00883 void ** ppData; 00884 int i, k, m; 00885 00886 // partition the first AIG in the array 00887 assert( Vec_PtrSize(vAigs) > 1 ); 00888 pAig = Vec_PtrEntry( vAigs, 0 ); 00889 vParts = Aig_ManPartitionSmart( pAig, nPartSize, 0, NULL ); 00890 00891 // start the total fraiged AIG 00892 pAigTotal = Aig_ManStartFrom( pAig ); 00893 Aig_ManReprStart( pAigTotal, Vec_PtrSize(vAigs) * Aig_ManObjNumMax(pAig) + 10000 ); 00894 vOutsTotal = Vec_PtrStart( Aig_ManPoNum(pAig) ); 00895 00896 // set the PI numbers 00897 Vec_PtrForEachEntry( vAigs, pAig, i ) 00898 Aig_ManForEachPi( pAig, pObj, k ) 00899 pObj->pNext = (Aig_Obj_t *)(long)k; 00900 00901 Cmd_CommandExecute( Abc_FrameGetGlobalFrame(), "unset progressbar" ); 00902 00903 // create the total fraiged AIG 00904 vPartSupp = Vec_IntAlloc( 100 ); // maps part PI num into total PI num 00905 Vec_PtrForEachEntry( vParts, vPart, i ) 00906 { 00907 // derive the partition AIG 00908 pAigPart = Aig_ManStart( 5000 ); 00909 // pAigPart->pName = Extra_UtilStrsav( pAigPart->pName ); 00910 Vec_IntClear( vPartSupp ); 00911 Vec_PtrForEachEntry( vAigs, pAig, k ) 00912 { 00913 vOuts = Aig_ManDupPart( pAigPart, pAig, vPart, vPartSupp, 0 ); 00914 if ( k == 0 ) 00915 { 00916 Vec_PtrForEachEntry( vOuts, pObj, m ) 00917 Aig_ObjCreatePo( pAigPart, pObj ); 00918 } 00919 Vec_PtrFree( vOuts ); 00920 } 00921 // derive the total AIG from the partitioned AIG 00922 vOuts = Aig_ManDupPart( pAigTotal, pAigPart, vPart, vPartSupp, 1 ); 00923 // add to the outputs 00924 Vec_PtrForEachEntry( vOuts, pObj, k ) 00925 { 00926 assert( Vec_PtrEntry( vOutsTotal, Vec_IntEntry(vPart,k) ) == NULL ); 00927 Vec_PtrWriteEntry( vOutsTotal, Vec_IntEntry(vPart,k), pObj ); 00928 } 00929 Vec_PtrFree( vOuts ); 00930 // store contents of pData pointers 00931 ppData = ALLOC( void *, Aig_ManObjNumMax(pAigPart) ); 00932 Aig_ManForEachObj( pAigPart, pObj, k ) 00933 ppData[k] = pObj->pData; 00934 // report the process 00935 printf( "Part %4d (out of %4d) PI = %5d. PO = %5d. And = %6d. Lev = %4d.\r", 00936 i+1, Vec_PtrSize(vParts), Aig_ManPiNum(pAigPart), Aig_ManPoNum(pAigPart), 00937 Aig_ManNodeNum(pAigPart), Aig_ManLevelNum(pAigPart) ); 00938 // compute equivalence classes (to be stored in pNew->pReprs) 00939 pAig = Fra_FraigChoice( pAigPart, 1000 ); 00940 Aig_ManStop( pAig ); 00941 // reset the pData pointers 00942 Aig_ManForEachObj( pAigPart, pObj, k ) 00943 pObj->pData = ppData[k]; 00944 free( ppData ); 00945 // transfer representatives to the total AIG 00946 if ( pAigPart->pReprs ) 00947 Aig_ManTransferRepr( pAigTotal, pAigPart ); 00948 Aig_ManStop( pAigPart ); 00949 } 00950 printf( " \r" ); 00951 Vec_VecFree( (Vec_Vec_t *)vParts ); 00952 Vec_IntFree( vPartSupp ); 00953 00954 Cmd_CommandExecute( Abc_FrameGetGlobalFrame(), "set progressbar" ); 00955 00956 // clear the PI numbers 00957 Vec_PtrForEachEntry( vAigs, pAig, i ) 00958 Aig_ManForEachPi( pAig, pObj, k ) 00959 pObj->pNext = NULL; 00960 /* 00961 // collect the missing outputs (outputs whose driver is not a node) 00962 pAig = Vec_PtrEntry( vAigs, 0 ); 00963 Aig_ManConst1(pAig)->pData = Aig_ManConst1(pAigTotal); 00964 Aig_ManForEachPi( pAig, pObj, i ) 00965 pAig->pData = Aig_ManPi( pAigTotal, i ); 00966 Aig_ManForEachPo( pAig, pObj, i ) 00967 if ( !Aig_ObjIsNode(Aig_ObjFanin0(pObj)) ) 00968 { 00969 assert( Vec_PtrEntry( vOutsTotal, i ) == NULL ); 00970 Vec_PtrWriteEntry( vOutsTotal, i, Aig_ObjChild0Copy(pObj) ); 00971 } 00972 */ 00973 // add the outputs in the same order 00974 Vec_PtrForEachEntry( vOutsTotal, pObj, i ) 00975 Aig_ObjCreatePo( pAigTotal, pObj ); 00976 Vec_PtrFree( vOutsTotal ); 00977 00978 // derive the result of choicing 00979 pAig = Aig_ManRehash( pAigTotal ); 00980 // create the equivalent nodes lists 00981 Aig_ManMarkValidChoices( pAig ); 00982 return pAig; 00983 }
| void Aig_ManCleanData | ( | Aig_Man_t * | p | ) |
Function*************************************************************
Synopsis [Cleans the data pointers for the nodes.]
Description []
SideEffects []
SeeAlso []
Definition at line 180 of file aigUtil.c.
00181 { 00182 Aig_Obj_t * pObj; 00183 int i; 00184 Aig_ManForEachObj( p, pObj, i ) 00185 pObj->pData = NULL; 00186 }
| void Aig_ManCleanMarkA | ( | Aig_Man_t * | p | ) |
Function*************************************************************
Synopsis [Cleans MarkB.]
Description []
SideEffects []
SeeAlso []
Definition at line 142 of file aigUtil.c.
00143 { 00144 Aig_Obj_t * pObj; 00145 int i; 00146 Aig_ManForEachObj( p, pObj, i ) 00147 pObj->fMarkA = 0; 00148 }
| void Aig_ManCleanMarkB | ( | Aig_Man_t * | p | ) |
Function*************************************************************
Synopsis [Cleans MarkB.]
Description []
SideEffects []
SeeAlso []
Definition at line 161 of file aigUtil.c.
00162 { 00163 Aig_Obj_t * pObj; 00164 int i; 00165 Aig_ManForEachObj( p, pObj, i ) 00166 pObj->fMarkB = 0; 00167 }
| int Aig_ManCleanup | ( | Aig_Man_t * | p | ) |
Function*************************************************************
Synopsis [Returns the number of dangling nodes removed.]
Description []
SideEffects []
SeeAlso []
Definition at line 273 of file aigMan.c.
00274 { 00275 Vec_Ptr_t * vObjs; 00276 Aig_Obj_t * pNode; 00277 int i, nNodesOld; 00278 nNodesOld = Aig_ManNodeNum(p); 00279 // collect roots of dangling nodes 00280 vObjs = Vec_PtrAlloc( 100 ); 00281 Aig_ManForEachObj( p, pNode, i ) 00282 if ( Aig_ObjIsNode(pNode) && Aig_ObjRefs(pNode) == 0 ) 00283 Vec_PtrPush( vObjs, pNode ); 00284 // recursively remove dangling nodes 00285 Vec_PtrForEachEntry( vObjs, pNode, i ) 00286 Aig_ObjDelete_rec( p, pNode, 1 ); 00287 Vec_PtrFree( vObjs ); 00288 return nNodesOld - Aig_ManNodeNum(p); 00289 }
Function*************************************************************
Synopsis [Reduces the circuit using ternary simulation.]
Description []
SideEffects []
SeeAlso []
Definition at line 414 of file aigTsim.c.
00415 { 00416 Aig_Man_t * pTemp; 00417 Vec_Ptr_t * vMap; 00418 while ( (vMap = Aig_ManTernarySimulate( p, fVerbose )) ) 00419 { 00420 if ( fVerbose ) 00421 printf( "RBeg = %5d. NBeg = %6d. ", Aig_ManRegNum(p), Aig_ManNodeNum(p) ); 00422 p = Aig_ManRemap( pTemp = p, vMap ); 00423 Aig_ManStop( pTemp ); 00424 Vec_PtrFree( vMap ); 00425 Aig_ManSeqCleanup( p ); 00426 if ( fVerbose ) 00427 printf( "REnd = %5d. NEnd = %6d. \n", Aig_ManRegNum(p), Aig_ManNodeNum(p) ); 00428 } 00429 return p; 00430 }
| int Aig_ManCountLevels | ( | Aig_Man_t * | p | ) |
Function*************************************************************
Synopsis [Computes the max number of levels in the manager.]
Description []
SideEffects []
SeeAlso []
Definition at line 267 of file aigDfs.c.
00268 { 00269 Vec_Ptr_t * vNodes; 00270 Aig_Obj_t * pObj; 00271 int i, LevelsMax, Level0, Level1; 00272 // initialize the levels 00273 Aig_ManConst1(p)->iData = 0; 00274 Aig_ManForEachPi( p, pObj, i ) 00275 pObj->iData = 0; 00276 // compute levels in a DFS order 00277 vNodes = Aig_ManDfs( p ); 00278 Vec_PtrForEachEntry( vNodes, pObj, i ) 00279 { 00280 Level0 = Aig_ObjFanin0(pObj)->iData; 00281 Level1 = Aig_ObjFanin1(pObj)->iData; 00282 pObj->iData = 1 + Aig_ObjIsExor(pObj) + AIG_MAX(Level0, Level1); 00283 } 00284 Vec_PtrFree( vNodes ); 00285 // get levels of the POs 00286 LevelsMax = 0; 00287 Aig_ManForEachPo( p, pObj, i ) 00288 LevelsMax = AIG_MAX( LevelsMax, Aig_ObjFanin0(pObj)->iData ); 00289 return LevelsMax; 00290 }
| int Aig_ManCountMergeRegs | ( | Aig_Man_t * | p | ) |
Function*************************************************************
Synopsis [Returns the number of dangling nodes removed.]
Description []
SideEffects []
SeeAlso []
Definition at line 221 of file aigScl.c.
00222 { 00223 Aig_Obj_t * pObj, * pFanin; 00224 int i, Counter = 0, Const0 = 0, Const1 = 0; 00225 Aig_ManIncrementTravId( p ); 00226 Aig_ManForEachLiSeq( p, pObj, i ) 00227 { 00228 pFanin = Aig_ObjFanin0(pObj); 00229 if ( Aig_ObjIsConst1(pFanin) ) 00230 { 00231 if ( Aig_ObjFaninC0(pObj) ) 00232 Const0++; 00233 else 00234 Const1++; 00235 } 00236 if ( Aig_ObjIsTravIdCurrent(p, pFanin) ) 00237 continue; 00238 Aig_ObjSetTravIdCurrent(p, pFanin); 00239 Counter++; 00240 } 00241 printf( "Regs = %d. Fanins = %d. Const0 = %d. Const1 = %d.\n", 00242 Aig_ManRegNum(p), Counter, Const0, Const1 ); 00243 return 0; 00244 }
| unsigned* Aig_ManCutTruth | ( | Aig_Obj_t * | pRoot, | |
| Vec_Ptr_t * | vLeaves, | |||
| Vec_Ptr_t * | vNodes, | |||
| Vec_Ptr_t * | vTruthElem, | |||
| Vec_Ptr_t * | vTruthStore | |||
| ) |
Function*************************************************************
Synopsis [Computes truth table of the cut.]
Description [The returned pointer should be used immediately.]
SideEffects []
SeeAlso []
Definition at line 77 of file aigTruth.c.
00078 { 00079 Aig_Obj_t * pObj; 00080 int i, nWords; 00081 assert( Vec_PtrSize(vLeaves) <= Vec_PtrSize(vTruthElem) ); 00082 assert( Vec_PtrSize(vNodes) <= Vec_PtrSize(vTruthStore) ); 00083 assert( Vec_PtrSize(vNodes) == 0 || pRoot == Vec_PtrEntryLast(vNodes) ); 00084 // assign elementary truth tables 00085 Vec_PtrForEachEntry( vLeaves, pObj, i ) 00086 pObj->pData = Vec_PtrEntry( vTruthElem, i ); 00087 // compute truths for other nodes 00088 nWords = Aig_TruthWordNum( Vec_PtrSize(vLeaves) ); 00089 Vec_PtrForEachEntry( vNodes, pObj, i ) 00090 pObj->pData = Aig_ManCutTruthOne( pObj, Vec_PtrEntry(vTruthStore, i), nWords ); 00091 return pRoot->pData; 00092 }
Function*************************************************************
Synopsis [Collects internal nodes in the DFS order.]
Description []
SideEffects []
SeeAlso []
Definition at line 68 of file aigDfs.c.
00069 { 00070 Vec_Ptr_t * vNodes; 00071 Aig_Obj_t * pObj; 00072 int i; 00073 Aig_ManIncrementTravId( p ); 00074 // mark constant and PIs 00075 Aig_ObjSetTravIdCurrent( p, Aig_ManConst1(p) ); 00076 Aig_ManForEachPi( p, pObj, i ) 00077 Aig_ObjSetTravIdCurrent( p, pObj ); 00078 // if there are latches, mark them 00079 if ( Aig_ManLatchNum(p) > 0 ) 00080 Aig_ManForEachObj( p, pObj, i ) 00081 if ( Aig_ObjIsLatch(pObj) ) 00082 Aig_ObjSetTravIdCurrent( p, pObj ); 00083 // go through the nodes 00084 vNodes = Vec_PtrAlloc( Aig_ManNodeNum(p) ); 00085 Aig_ManForEachObj( p, pObj, i ) 00086 if ( Aig_ObjIsNode(pObj) || Aig_ObjIsBuf(pObj) ) 00087 Aig_ManDfs_rec( p, pObj, vNodes ); 00088 return vNodes; 00089 }
Function*************************************************************
Synopsis [Collects internal nodes in the DFS order.]
Description []
SideEffects []
SeeAlso []
Definition at line 158 of file aigDfs.c.
00159 { 00160 Vec_Ptr_t * vNodes; 00161 Aig_Obj_t * pObj; 00162 int i; 00163 assert( p->pEquivs != NULL ); 00164 Aig_ManIncrementTravId( p ); 00165 // mark constant and PIs 00166 Aig_ObjSetTravIdCurrent( p, Aig_ManConst1(p) ); 00167 Aig_ManForEachPi( p, pObj, i ) 00168 Aig_ObjSetTravIdCurrent( p, pObj ); 00169 // go through the nodes 00170 vNodes = Vec_PtrAlloc( Aig_ManNodeNum(p) ); 00171 Aig_ManForEachPo( p, pObj, i ) 00172 Aig_ManDfsChoices_rec( p, Aig_ObjFanin0(pObj), vNodes ); 00173 return vNodes; 00174 }
Function*************************************************************
Synopsis [Collects internal nodes in the DFS order.]
Description []
SideEffects []
SeeAlso []
Definition at line 102 of file aigDfs.c.
00103 { 00104 Vec_Ptr_t * vNodes; 00105 Aig_Obj_t * pObj; 00106 int i; 00107 assert( Aig_ManLatchNum(p) == 0 ); 00108 Aig_ManIncrementTravId( p ); 00109 // mark constant and PIs 00110 Aig_ObjSetTravIdCurrent( p, Aig_ManConst1(p) ); 00111 Aig_ManForEachPi( p, pObj, i ) 00112 Aig_ObjSetTravIdCurrent( p, pObj ); 00113 // go through the nodes 00114 vNodes = Vec_PtrAlloc( Aig_ManNodeNum(p) ); 00115 for ( i = 0; i < nNodes; i++ ) 00116 Aig_ManDfs_rec( p, ppNodes[i], vNodes ); 00117 return vNodes; 00118 }
Function*************************************************************
Synopsis [Collects internal nodes in the reverse DFS order.]
Description []
SideEffects []
SeeAlso []
Definition at line 213 of file aigDfs.c.
00214 { 00215 Vec_Ptr_t * vNodes; 00216 Aig_Obj_t * pObj; 00217 int i; 00218 Aig_ManIncrementTravId( p ); 00219 // mark POs 00220 Aig_ManForEachPo( p, pObj, i ) 00221 Aig_ObjSetTravIdCurrent( p, pObj ); 00222 // if there are latches, mark them 00223 if ( Aig_ManLatchNum(p) > 0 ) 00224 Aig_ManForEachObj( p, pObj, i ) 00225 if ( Aig_ObjIsLatch(pObj) ) 00226 Aig_ObjSetTravIdCurrent( p, pObj ); 00227 // go through the nodes 00228 vNodes = Vec_PtrAlloc( Aig_ManNodeNum(p) ); 00229 Aig_ManForEachObj( p, pObj, i ) 00230 if ( Aig_ObjIsNode(pObj) || Aig_ObjIsBuf(pObj) ) 00231 Aig_ManDfsReverse_rec( p, pObj, vNodes ); 00232 return vNodes; 00233 }
| void Aig_ManDump | ( | Aig_Man_t * | p | ) |
Function*************************************************************
Synopsis [Write speculative miter for one node.]
Description []
SideEffects []
SeeAlso []
Definition at line 640 of file aigUtil.c.
00641 { 00642 static int Counter = 0; 00643 char FileName[20]; 00644 // dump the logic into a file 00645 sprintf( FileName, "aigbug\\%03d.blif", ++Counter ); 00646 Aig_ManDumpBlif( p, FileName ); 00647 printf( "Intermediate AIG with %d nodes was written into file \"%s\".\n", Aig_ManNodeNum(p), FileName ); 00648 }
| void Aig_ManDumpBlif | ( | Aig_Man_t * | p, | |
| char * | pFileName | |||
| ) |
Function*************************************************************
Synopsis [Writes the AIG into the BLIF file.]
Description []
SideEffects []
SeeAlso []
Definition at line 661 of file aigUtil.c.
00662 { 00663 FILE * pFile; 00664 Vec_Ptr_t * vNodes; 00665 Aig_Obj_t * pObj, * pObjLi, * pObjLo, * pConst1 = NULL; 00666 int i, nDigits, Counter = 0; 00667 if ( Aig_ManPoNum(p) == 0 ) 00668 { 00669 printf( "Aig_ManDumpBlif(): AIG manager does not have POs.\n" ); 00670 return; 00671 } 00672 // collect nodes in the DFS order 00673 vNodes = Aig_ManDfs( p ); 00674 // assign IDs to objects 00675 Aig_ManConst1(p)->iData = Counter++; 00676 Aig_ManForEachPi( p, pObj, i ) 00677 pObj->iData = Counter++; 00678 Aig_ManForEachPo( p, pObj, i ) 00679 pObj->iData = Counter++; 00680 Vec_PtrForEachEntry( vNodes, pObj, i ) 00681 pObj->iData = Counter++; 00682 nDigits = Aig_Base10Log( Counter ); 00683 // write the file 00684 pFile = fopen( pFileName, "w" ); 00685 fprintf( pFile, "# BLIF file written by procedure Aig_ManDumpBlif()\n" ); 00686 // fprintf( pFile, "# http://www.eecs.berkeley.edu/~alanmi/abc/\n" ); 00687 fprintf( pFile, ".model test\n" ); 00688 // write PIs 00689 fprintf( pFile, ".inputs" ); 00690 Aig_ManForEachPiSeq( p, pObj, i ) 00691 fprintf( pFile, " n%0*d", nDigits, pObj->iData ); 00692 fprintf( pFile, "\n" ); 00693 // write POs 00694 fprintf( pFile, ".outputs" ); 00695 Aig_ManForEachPoSeq( p, pObj, i ) 00696 fprintf( pFile, " n%0*d", nDigits, pObj->iData ); 00697 fprintf( pFile, "\n" ); 00698 // write latches 00699 if ( Aig_ManRegNum(p) ) 00700 { 00701 fprintf( pFile, "\n" ); 00702 Aig_ManForEachLiLoSeq( p, pObjLi, pObjLo, i ) 00703 fprintf( pFile, ".latch n%0*d n%0*d 0\n", nDigits, pObjLi->iData, nDigits, pObjLo->iData ); 00704 fprintf( pFile, "\n" ); 00705 } 00706 // write nodes 00707 Vec_PtrForEachEntry( vNodes, pObj, i ) 00708 { 00709 fprintf( pFile, ".names n%0*d n%0*d n%0*d\n", 00710 nDigits, Aig_ObjFanin0(pObj)->iData, 00711 nDigits, Aig_ObjFanin1(pObj)->iData, 00712 nDigits, pObj->iData ); 00713 fprintf( pFile, "%d%d 1\n", !Aig_ObjFaninC0(pObj), !Aig_ObjFaninC1(pObj) ); 00714 } 00715 // write POs 00716 Aig_ManForEachPo( p, pObj, i ) 00717 { 00718 fprintf( pFile, ".names n%0*d n%0*d\n", 00719 nDigits, Aig_ObjFanin0(pObj)->iData, 00720 nDigits, pObj->iData ); 00721 fprintf( pFile, "%d 1\n", !Aig_ObjFaninC0(pObj) ); 00722 if ( Aig_ObjIsConst1(Aig_ObjFanin0(pObj)) ) 00723 pConst1 = Aig_ManConst1(p); 00724 } 00725 if ( pConst1 ) 00726 fprintf( pFile, ".names n%0*d\n 1\n", nDigits, pConst1->iData ); 00727 fprintf( pFile, ".end\n\n" ); 00728 fclose( pFile ); 00729 Vec_PtrFree( vNodes ); 00730 }
| void Aig_ManDumpVerilog | ( | Aig_Man_t * | p, | |
| char * | pFileName | |||
| ) |
Function*************************************************************
Synopsis [Writes the AIG into the BLIF file.]
Description []
SideEffects []
SeeAlso []
Definition at line 743 of file aigUtil.c.
00744 { 00745 FILE * pFile; 00746 Vec_Ptr_t * vNodes; 00747 Aig_Obj_t * pObj, * pObjLi, * pObjLo, * pConst1 = NULL; 00748 int i, nDigits, Counter = 0; 00749 if ( Aig_ManPoNum(p) == 0 ) 00750 { 00751 printf( "Aig_ManDumpBlif(): AIG manager does not have POs.\n" ); 00752 return; 00753 } 00754 // collect nodes in the DFS order 00755 vNodes = Aig_ManDfs( p ); 00756 // assign IDs to objects 00757 Aig_ManConst1(p)->iData = Counter++; 00758 Aig_ManForEachPi( p, pObj, i ) 00759 pObj->iData = Counter++; 00760 Aig_ManForEachPo( p, pObj, i ) 00761 pObj->iData = Counter++; 00762 Vec_PtrForEachEntry( vNodes, pObj, i ) 00763 pObj->iData = Counter++; 00764 nDigits = Aig_Base10Log( Counter ); 00765 // write the file 00766 pFile = fopen( pFileName, "w" ); 00767 fprintf( pFile, "// Verilog file written by procedure Aig_ManDumpVerilog()\n" ); 00768 // fprintf( pFile, "// http://www.eecs.berkeley.edu/~alanmi/abc/\n" ); 00769 if ( Aig_ManRegNum(p) ) 00770 fprintf( pFile, "module %s ( clock", p->pName? p->pName: "test" ); 00771 else 00772 fprintf( pFile, "module %s (", p->pName? p->pName: "test" ); 00773 Aig_ManForEachPiSeq( p, pObj, i ) 00774 fprintf( pFile, "%s n%0*d", ((Aig_ManRegNum(p) || i)? ",":""), nDigits, pObj->iData ); 00775 Aig_ManForEachPoSeq( p, pObj, i ) 00776 fprintf( pFile, ", n%0*d", nDigits, pObj->iData ); 00777 fprintf( pFile, " );\n" ); 00778 00779 // write PIs 00780 if ( Aig_ManRegNum(p) ) 00781 fprintf( pFile, "input clock;\n" ); 00782 Aig_ManForEachPiSeq( p, pObj, i ) 00783 fprintf( pFile, "input n%0*d;\n", nDigits, pObj->iData ); 00784 // write POs 00785 Aig_ManForEachPoSeq( p, pObj, i ) 00786 fprintf( pFile, "output n%0*d;\n", nDigits, pObj->iData ); 00787 // write latches 00788 if ( Aig_ManRegNum(p) ) 00789 { 00790 Aig_ManForEachLiLoSeq( p, pObjLi, pObjLo, i ) 00791 fprintf( pFile, "reg n%0*d;\n", nDigits, pObjLo->iData ); 00792 Aig_ManForEachLiLoSeq( p, pObjLi, pObjLo, i ) 00793 fprintf( pFile, "wire n%0*d;\n", nDigits, pObjLi->iData ); 00794 } 00795 // write nodes 00796 Vec_PtrForEachEntry( vNodes, pObj, i ) 00797 fprintf( pFile, "wire n%0*d;\n", nDigits, pObj->iData ); 00798 // write nodes 00799 Vec_PtrForEachEntry( vNodes, pObj, i ) 00800 { 00801 fprintf( pFile, "assign n%0*d = %sn%0*d & %sn%0*d;\n", 00802 nDigits, pObj->iData, 00803 !Aig_ObjFaninC0(pObj) ? " " : "~", nDigits, Aig_ObjFanin0(pObj)->iData, 00804 !Aig_ObjFaninC1(pObj) ? " " : "~", nDigits, Aig_ObjFanin1(pObj)->iData 00805 ); 00806 } 00807 // write POs 00808 Aig_ManForEachPoSeq( p, pObj, i ) 00809 { 00810 fprintf( pFile, "assign n%0*d = %sn%0*d;\n", 00811 nDigits, pObj->iData, 00812 !Aig_ObjFaninC0(pObj) ? " " : "~", nDigits, Aig_ObjFanin0(pObj)->iData ); 00813 if ( Aig_ObjIsConst1(Aig_ObjFanin0(pObj)) ) 00814 pConst1 = Aig_ManConst1(p); 00815 } 00816 if ( Aig_ManRegNum(p) ) 00817 { 00818 Aig_ManForEachLiLoSeq( p, pObjLi, pObjLo, i ) 00819 { 00820 fprintf( pFile, "assign n%0*d = %sn%0*d;\n", 00821 nDigits, pObjLi->iData, 00822 !Aig_ObjFaninC0(pObjLi) ? " " : "~", nDigits, Aig_ObjFanin0(pObjLi)->iData ); 00823 if ( Aig_ObjIsConst1(Aig_ObjFanin0(pObjLi)) ) 00824 pConst1 = Aig_ManConst1(p); 00825 } 00826 } 00827 if ( pConst1 ) 00828 fprintf( pFile, "assign n%0*d = 1\'b1;\n", nDigits, pConst1->iData ); 00829 00830 // write initial state 00831 if ( Aig_ManRegNum(p) ) 00832 { 00833 Aig_ManForEachLiLoSeq( p, pObjLi, pObjLo, i ) 00834 fprintf( pFile, "always @ (posedge clock) begin n%0*d <= n%0*d; end\n", 00835 nDigits, pObjLo->iData, 00836 nDigits, pObjLi->iData ); 00837 Aig_ManForEachLiLoSeq( p, pObjLi, pObjLo, i ) 00838 fprintf( pFile, "initial begin n%0*d <= 1\'b0; end\n", 00839 nDigits, pObjLo->iData ); 00840 } 00841 00842 fprintf( pFile, "endmodule\n\n" ); 00843 fclose( pFile ); 00844 Vec_PtrFree( vNodes ); 00845 }
Function*************************************************************
Synopsis [Duplicates the AIG manager.]
Description []
SideEffects []
SeeAlso []
Definition at line 132 of file aigMan.c.
00133 { 00134 Aig_Man_t * pNew; 00135 Aig_Obj_t * pObj; 00136 int i; 00137 // create the new manager 00138 pNew = Aig_ManStart( Aig_ManObjNumMax(p) ); 00139 pNew->pName = Aig_UtilStrsav( p->pName ); 00140 pNew->nRegs = p->nRegs; 00141 pNew->nAsserts = p->nAsserts; 00142 if ( p->vFlopNums ) 00143 pNew->vFlopNums = Vec_IntDup( p->vFlopNums ); 00144 // create the PIs 00145 Aig_ManCleanData( p ); 00146 Aig_ManConst1(p)->pData = Aig_ManConst1(pNew); 00147 Aig_ManForEachPi( p, pObj, i ) 00148 pObj->pData = Aig_ObjCreatePi(pNew); 00149 // duplicate internal nodes 00150 if ( fOrdered ) 00151 { 00152 Aig_ManForEachObj( p, pObj, i ) 00153 if ( Aig_ObjIsBuf(pObj) ) 00154 pObj->pData = Aig_ObjChild0Copy(pObj); 00155 else if ( Aig_ObjIsNode(pObj) ) 00156 pObj->pData = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) ); 00157 } 00158 else 00159 { 00160 Aig_ManForEachObj( p, pObj, i ) 00161 if ( !Aig_ObjIsPo(pObj) ) 00162 { 00163 Aig_ManDup_rec( pNew, p, pObj ); 00164 assert( pObj->Level == ((Aig_Obj_t*)pObj->pData)->Level ); 00165 } 00166 } 00167 // add the POs 00168 Aig_ManForEachPo( p, pObj, i ) 00169 Aig_ObjCreatePo( pNew, Aig_ObjChild0Copy(pObj) ); 00170 assert( Aig_ManBufNum(p) != 0 || Aig_ManNodeNum(p) == Aig_ManNodeNum(pNew) ); 00171 // check the resulting network 00172 if ( !Aig_ManCheck(pNew) ) 00173 printf( "Aig_ManDup(): The check has failed.\n" ); 00174 return pNew; 00175 }
Function*************************************************************
Synopsis [Duplicates the AIG manager recursively.]
Description []
SideEffects []
SeeAlso []
Definition at line 110 of file aigMan.c.
00111 { 00112 if ( pObj->pData ) 00113 return pObj->pData; 00114 Aig_ManDup_rec( pNew, p, Aig_ObjFanin0(pObj) ); 00115 if ( Aig_ObjIsBuf(pObj) ) 00116 return pObj->pData = Aig_ObjChild0Copy(pObj); 00117 Aig_ManDup_rec( pNew, p, Aig_ObjFanin1(pObj) ); 00118 return pObj->pData = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) ); 00119 }
Function*************************************************************
Synopsis [Duplicates AIG while substituting representatives.]
Description []
SideEffects []
SeeAlso []
Definition at line 264 of file aigRepr.c.
00265 { 00266 Aig_Man_t * pNew; 00267 Aig_Obj_t * pObj; 00268 int i; 00269 // start the HOP package 00270 pNew = Aig_ManStart( Aig_ManObjNumMax(p) ); 00271 pNew->pName = Aig_UtilStrsav( p->pName ); 00272 pNew->nRegs = p->nRegs; 00273 if ( p->vFlopNums ) 00274 pNew->vFlopNums = Vec_IntDup( p->vFlopNums ); 00275 // map the const and primary inputs 00276 Aig_ManCleanData( p ); 00277 Aig_ManConst1(p)->pData = Aig_ManConst1(pNew); 00278 Aig_ManForEachPi( p, pObj, i ) 00279 pObj->pData = Aig_ObjCreatePi(pNew); 00280 // map the internal nodes 00281 if ( fOrdered ) 00282 { 00283 Aig_ManForEachNode( p, pObj, i ) 00284 pObj->pData = Aig_And( pNew, Aig_ObjChild0Repr(p, pObj), Aig_ObjChild1Repr(p, pObj) ); 00285 } 00286 else 00287 { 00288 Aig_ManForEachPo( p, pObj, i ) 00289 Aig_ManDupRepr_rec( pNew, p, Aig_ObjFanin0(pObj) ); 00290 } 00291 // transfer the POs 00292 Aig_ManForEachPo( p, pObj, i ) 00293 Aig_ObjCreatePo( pNew, Aig_ObjChild0Repr(p, pObj) ); 00294 // check the new manager 00295 if ( !Aig_ManCheck(pNew) ) 00296 printf( "Aig_ManDupRepr: Check has failed.\n" ); 00297 return pNew; 00298 }
| static int Aig_ManExorNum | ( | Aig_Man_t * | p | ) | [inline, static] |
Definition at line 188 of file aig.h.
00188 { return p->nObjs[AIG_OBJ_EXOR]; }
Function*************************************************************
Synopsis [Extracts the miter composed of XOR of the two nodes.]
Description []
SideEffects []
SeeAlso []
Definition at line 188 of file aigMan.c.
00189 { 00190 Aig_Man_t * pNew; 00191 Aig_Obj_t * pObj; 00192 int i; 00193 // create the new manager 00194 pNew = Aig_ManStart( Aig_ManObjNumMax(p) ); 00195 pNew->pName = Aig_UtilStrsav( p->pName ); 00196 // create the PIs 00197 Aig_ManCleanData( p ); 00198 Aig_ManConst1(p)->pData = Aig_ManConst1(pNew); 00199 Aig_ManForEachPi( p, pObj, i ) 00200 pObj->pData = Aig_ObjCreatePi(pNew); 00201 // dump the nodes 00202 Aig_ManDup_rec( pNew, p, pNode1 ); 00203 Aig_ManDup_rec( pNew, p, pNode2 ); 00204 // construct the EXOR 00205 pObj = Aig_Exor( pNew, pNode1->pData, pNode2->pData ); 00206 pObj = Aig_NotCond( pObj, Aig_Regular(pObj)->fPhase ^ Aig_IsComplement(pObj) ); 00207 // add the PO 00208 Aig_ObjCreatePo( pNew, pObj ); 00209 // check the resulting network 00210 if ( !Aig_ManCheck(pNew) ) 00211 printf( "Aig_ManDup(): The check has failed.\n" ); 00212 return pNew; 00213 }
| void Aig_ManFanoutStart | ( | Aig_Man_t * | p | ) |
FUNCTION DEFINITIONS ///Function*************************************************************
Synopsis [Create fanout for all objects in the manager.]
Description []
SideEffects []
SeeAlso []
Definition at line 53 of file aigFanout.c.
00054 { 00055 Aig_Obj_t * pObj; 00056 int i; 00057 assert( Aig_ManBufNum(p) == 0 ); 00058 // allocate fanout datastructure 00059 assert( p->pFanData == NULL ); 00060 p->nFansAlloc = 2 * Aig_ManObjNumMax(p); 00061 if ( p->nFansAlloc < (1<<12) ) 00062 p->nFansAlloc = (1<<12); 00063 p->pFanData = ALLOC( int, 5 * p->nFansAlloc ); 00064 memset( p->pFanData, 0, sizeof(int) * 5 * p->nFansAlloc ); 00065 // add fanouts for all objects 00066 Aig_ManForEachObj( p, pObj, i ) 00067 { 00068 if ( Aig_ObjChild0(pObj) ) 00069 Aig_ObjAddFanout( p, Aig_ObjFanin0(pObj), pObj ); 00070 if ( Aig_ObjChild1(pObj) ) 00071 Aig_ObjAddFanout( p, Aig_ObjFanin1(pObj), pObj ); 00072 } 00073 }
| void Aig_ManFanoutStop | ( | Aig_Man_t * | p | ) |
Function*************************************************************
Synopsis [Deletes fanout for all objects in the manager.]
Description []
SideEffects []
SeeAlso []
Definition at line 86 of file aigFanout.c.
Definition at line 286 of file aig.h.
00287 { 00288 extern char * Aig_MmFixedEntryFetch( Aig_MmFixed_t * p ); 00289 Aig_Obj_t * pTemp; 00290 pTemp = (Aig_Obj_t *)Aig_MmFixedEntryFetch( p->pMemObjs ); 00291 memset( pTemp, 0, sizeof(Aig_Obj_t) ); 00292 Vec_PtrPush( p->vObjs, pTemp ); 00293 pTemp->Id = p->nCreated++; 00294 return pTemp; 00295 }
| void Aig_ManFindCut | ( | Aig_Obj_t * | pRoot, | |
| Vec_Ptr_t * | vFront, | |||
| Vec_Ptr_t * | vVisited, | |||
| int | nSizeLimit, | |||
| int | nFanoutLimit | |||
| ) |
Function*************************************************************
Synopsis [Computes one sequential cut of the given size.]
Description []
SideEffects []
SeeAlso []
Definition at line 142 of file aigWin.c.
00143 { 00144 Aig_Obj_t * pNode; 00145 int i; 00146 00147 assert( !Aig_IsComplement(pRoot) ); 00148 assert( Aig_ObjIsNode(pRoot) ); 00149 assert( Aig_ObjChild0(pRoot) ); 00150 assert( Aig_ObjChild1(pRoot) ); 00151 00152 // start the cut 00153 Vec_PtrClear( vFront ); 00154 Vec_PtrPush( vFront, Aig_ObjFanin0(pRoot) ); 00155 Vec_PtrPush( vFront, Aig_ObjFanin1(pRoot) ); 00156 00157 // start the visited nodes 00158 Vec_PtrClear( vVisited ); 00159 Vec_PtrPush( vVisited, pRoot ); 00160 Vec_PtrPush( vVisited, Aig_ObjFanin0(pRoot) ); 00161 Vec_PtrPush( vVisited, Aig_ObjFanin1(pRoot) ); 00162 00163 // mark these nodes 00164 assert( !pRoot->fMarkA ); 00165 assert( !Aig_ObjFanin0(pRoot)->fMarkA ); 00166 assert( !Aig_ObjFanin1(pRoot)->fMarkA ); 00167 pRoot->fMarkA = 1; 00168 Aig_ObjFanin0(pRoot)->fMarkA = 1; 00169 Aig_ObjFanin1(pRoot)->fMarkA = 1; 00170 00171 // compute the cut 00172 while ( Aig_ManFindCut_int( vFront, vVisited, nSizeLimit, nFanoutLimit ) ); 00173 assert( Vec_PtrSize(vFront) <= nSizeLimit ); 00174 00175 // clean the visit markings 00176 Vec_PtrForEachEntry( vVisited, pNode, i ) 00177 pNode->fMarkA = 0; 00178 }
| static int Aig_ManGetCost | ( | Aig_Man_t * | p | ) | [inline, static] |
Definition at line 191 of file aig.h.
00191 { return p->nObjs[AIG_OBJ_AND]+3*p->nObjs[AIG_OBJ_EXOR]; }
| void Aig_ManIncrementTravId | ( | Aig_Man_t * | p | ) |
Function*************************************************************
Synopsis [Increments the current traversal ID of the network.]
Description []
SideEffects []
SeeAlso []
Definition at line 78 of file aigUtil.c.
00079 { 00080 if ( p->nTravIds >= (1<<30)-1 ) 00081 Aig_ManCleanData( p ); 00082 p->nTravIds++; 00083 }
| static int Aig_ManLatchNum | ( | Aig_Man_t * | p | ) | [inline, static] |
Definition at line 189 of file aig.h.
00189 { return p->nObjs[AIG_OBJ_LATCH]; }
| int Aig_ManLevelNum | ( | Aig_Man_t * | p | ) |
Function*************************************************************
Synopsis [Computes the max number of levels in the manager.]
Description []
SideEffects []
SeeAlso []
Definition at line 246 of file aigDfs.c.
00247 { 00248 Aig_Obj_t * pObj; 00249 int i, LevelsMax; 00250 LevelsMax = 0; 00251 Aig_ManForEachPo( p, pObj, i ) 00252 LevelsMax = AIG_MAX( LevelsMax, (int)Aig_ObjFanin0(pObj)->Level ); 00253 return LevelsMax; 00254 }
| int Aig_ManLevels | ( | Aig_Man_t * | p | ) |
Function*************************************************************
Synopsis [Collect the latches.]
Description []
SideEffects []
SeeAlso []
Definition at line 96 of file aigUtil.c.
00097 { 00098 Aig_Obj_t * pObj; 00099 int i, LevelMax = 0; 00100 Aig_ManForEachPo( p, pObj, i ) 00101 LevelMax = AIG_MAX( LevelMax, (int)Aig_ObjFanin0(pObj)->Level ); 00102 return LevelMax; 00103 }
Definition at line 202 of file aig.h.
00202 { return (Aig_Obj_t *)Vec_PtrEntry(p->vPos, Aig_ManPoNum(p)-Aig_ManRegNum(p)+i); }
Definition at line 201 of file aig.h.
00201 { return (Aig_Obj_t *)Vec_PtrEntry(p->vPis, Aig_ManPiNum(p)-Aig_ManRegNum(p)+i); }
| void Aig_ManMarkValidChoices | ( | Aig_Man_t * | p | ) |
Function*************************************************************
Synopsis [Marks the nodes that are Creates choices.]
Description [The input AIG is assumed to have representatives assigned.]
SideEffects []
SeeAlso []
Definition at line 417 of file aigRepr.c.
00418 { 00419 Aig_Obj_t * pObj, * pRepr; 00420 int i; 00421 assert( p->pReprs != NULL ); 00422 // create equivalent nodes in the manager 00423 assert( p->pEquivs == NULL ); 00424 p->pEquivs = ALLOC( Aig_Obj_t *, Aig_ManObjNumMax(p) ); 00425 memset( p->pEquivs, 0, sizeof(Aig_Obj_t *) * Aig_ManObjNumMax(p) ); 00426 // make the choice nodes 00427 Aig_ManForEachNode( p, pObj, i ) 00428 { 00429 pRepr = Aig_ObjFindRepr( p, pObj ); 00430 if ( pRepr == NULL ) 00431 continue; 00432 assert( pObj->nRefs == 0 ); 00433 // skip constant and PI classes 00434 if ( !Aig_ObjIsNode(pRepr) ) 00435 { 00436 Aig_ObjClearRepr( p, pObj ); 00437 continue; 00438 } 00439 // skip choices with combinatinal loops 00440 if ( Aig_ObjCheckTfi( p, pObj, pRepr ) ) 00441 { 00442 Aig_ObjClearRepr( p, pObj ); 00443 continue; 00444 } 00445 //printf( "Node %d is represented by node %d.\n", pObj->Id, pRepr->Id ); 00446 // add choice to the choice node 00447 p->pEquivs[pObj->Id] = p->pEquivs[pRepr->Id]; 00448 p->pEquivs[pRepr->Id] = pObj; 00449 } 00450 }
| static int Aig_ManNodeNum | ( | Aig_Man_t * | p | ) | [inline, static] |
Definition at line 190 of file aig.h.
00190 { return p->nObjs[AIG_OBJ_AND]+p->nObjs[AIG_OBJ_EXOR]; }
| static int Aig_ManObjNum | ( | Aig_Man_t * | p | ) | [inline, static] |
| static int Aig_ManObjNumMax | ( | Aig_Man_t * | p | ) | [inline, static] |
Definition at line 193 of file aig.h.
00193 { return Vec_PtrSize(p->vObjs); }
| void Aig_ManOrderStart | ( | Aig_Man_t * | p | ) |
CFile****************************************************************
FileName [aigOrder.c]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [AIG package.]
Synopsis [Dynamically updated topological order.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - April 28, 2007.]
Revision [
- Id
- aigOrder.c,v 1.00 2007/04/28 00:00:00 alanmi Exp
] DECLARATIONS /// FUNCTION DEFINITIONS ///Function*************************************************************
Synopsis [Initializes the order datastructure.]
Description []
SideEffects []
SeeAlso []
Definition at line 42 of file aigOrder.c.
00043 { 00044 Aig_Obj_t * pObj; 00045 int i; 00046 assert( Aig_ManBufNum(p) == 0 ); 00047 // allocate order datastructure 00048 assert( p->pOrderData == NULL ); 00049 p->nOrderAlloc = 2 * Aig_ManObjNumMax(p); 00050 if ( p->nOrderAlloc < (1<<12) ) 00051 p->nOrderAlloc = (1<<12); 00052 p->pOrderData = ALLOC( unsigned, 2 * p->nOrderAlloc ); 00053 memset( p->pOrderData, 0xFF, sizeof(unsigned) * 2 * p->nOrderAlloc ); 00054 // add the constant node 00055 p->pOrderData[0] = p->pOrderData[1] = 0; 00056 p->iPrev = p->iNext = 0; 00057 // add the internal nodes 00058 Aig_ManForEachNode( p, pObj, i ) 00059 Aig_ObjOrderInsert( p, pObj->Id ); 00060 }
| void Aig_ManOrderStop | ( | Aig_Man_t * | p | ) |
Function*************************************************************
Synopsis [Deletes the order datastructure.]
Description []
SideEffects []
SeeAlso []
Definition at line 73 of file aigOrder.c.
00074 { 00075 assert( p->pOrderData ); 00076 FREE( p->pOrderData ); 00077 p->nOrderAlloc = 0; 00078 p->iPrev = p->iNext = 0; 00079 }
Function*************************************************************
Synopsis [Perform the naive partitioning.]
Description []
SideEffects []
SeeAlso []
Definition at line 697 of file aigPart.c.
00698 { 00699 Vec_Ptr_t * vParts; 00700 Aig_Obj_t * pObj; 00701 int nParts, i; 00702 nParts = (Aig_ManPoNum(p) / nPartSize) + ((Aig_ManPoNum(p) % nPartSize) > 0); 00703 vParts = (Vec_Ptr_t *)Vec_VecStart( nParts ); 00704 Aig_ManForEachPo( p, pObj, i ) 00705 Vec_IntPush( Vec_PtrEntry(vParts, i / nPartSize), i ); 00706 return vParts; 00707 }
| Vec_Ptr_t* Aig_ManPartitionSmart | ( | Aig_Man_t * | p, | |
| int | nSuppSizeLimit, | |||
| int | fVerbose, | |||
| Vec_Ptr_t ** | pvPartSupps | |||
| ) |
Function*************************************************************
Synopsis [Perform the smart partitioning.]
Description []
SideEffects []
SeeAlso []
Definition at line 573 of file aigPart.c.
00574 { 00575 Vec_Ptr_t * vPartSuppsBit; 00576 Vec_Ptr_t * vSupports, * vPartsAll, * vPartsAll2, * vPartSuppsAll;//, * vPartPtr; 00577 Vec_Int_t * vOne, * vPart, * vPartSupp, * vTemp; 00578 int i, iPart, iOut, clk; 00579 00580 // compute the supports for all outputs 00581 clk = clock(); 00582 vSupports = Aig_ManSupports( p ); 00583 if ( fVerbose ) 00584 { 00585 PRT( "Supps", clock() - clk ); 00586 } 00587 // start char-based support representation 00588 vPartSuppsBit = Vec_PtrAlloc( 1000 ); 00589 00590 // create partitions 00591 clk = clock(); 00592 vPartsAll = Vec_PtrAlloc( 256 ); 00593 vPartSuppsAll = Vec_PtrAlloc( 256 ); 00594 Vec_PtrForEachEntry( vSupports, vOne, i ) 00595 { 00596 // get the output number 00597 iOut = Vec_IntPop(vOne); 00598 // find closely matching part 00599 iPart = Aig_ManPartitionSmartFindPart( vPartSuppsAll, vPartsAll, vPartSuppsBit, nSuppSizeLimit, vOne ); 00600 if ( iPart == -1 ) 00601 { 00602 // create new partition 00603 vPart = Vec_IntAlloc( 32 ); 00604 Vec_IntPush( vPart, iOut ); 00605 // create new partition support 00606 vPartSupp = Vec_IntDup( vOne ); 00607 // add this partition and its support 00608 Vec_PtrPush( vPartsAll, vPart ); 00609 Vec_PtrPush( vPartSuppsAll, vPartSupp ); 00610 00611 Vec_PtrPush( vPartSuppsBit, Aig_ManSuppCharStart(vOne, Aig_ManPiNum(p)) ); 00612 } 00613 else 00614 { 00615 // add output to this partition 00616 vPart = Vec_PtrEntry( vPartsAll, iPart ); 00617 Vec_IntPush( vPart, iOut ); 00618 // merge supports 00619 vPartSupp = Vec_PtrEntry( vPartSuppsAll, iPart ); 00620 vPartSupp = Vec_IntTwoMerge( vTemp = vPartSupp, vOne ); 00621 Vec_IntFree( vTemp ); 00622 // reinsert new support 00623 Vec_PtrWriteEntry( vPartSuppsAll, iPart, vPartSupp ); 00624 00625 Aig_ManSuppCharAdd( Vec_PtrEntry(vPartSuppsBit, iPart), vOne, Aig_ManPiNum(p) ); 00626 } 00627 } 00628 00629 // stop char-based support representation 00630 Vec_PtrForEachEntry( vPartSuppsBit, vTemp, i ) 00631 free( vTemp ); 00632 Vec_PtrFree( vPartSuppsBit ); 00633 00634 //printf( "\n" ); 00635 if ( fVerbose ) 00636 { 00637 PRT( "Parts", clock() - clk ); 00638 } 00639 00640 clk = clock(); 00641 // reorder partitions in the decreasing order of support sizes 00642 // remember partition number in each partition support 00643 Vec_PtrForEachEntry( vPartSuppsAll, vOne, i ) 00644 Vec_IntPush( vOne, i ); 00645 // sort the supports in the decreasing order 00646 Vec_VecSort( (Vec_Vec_t *)vPartSuppsAll, 1 ); 00647 // reproduce partitions 00648 vPartsAll2 = Vec_PtrAlloc( 256 ); 00649 Vec_PtrForEachEntry( vPartSuppsAll, vOne, i ) 00650 Vec_PtrPush( vPartsAll2, Vec_PtrEntry(vPartsAll, Vec_IntPop(vOne)) ); 00651 Vec_PtrFree( vPartsAll ); 00652 vPartsAll = vPartsAll2; 00653 00654 // compact small partitions 00655 // Aig_ManPartitionPrint( p, vPartsAll, vPartSuppsAll ); 00656 Aig_ManPartitionCompact( vPartsAll, vPartSuppsAll, nSuppSizeLimit ); 00657 if ( fVerbose ) 00658 // Aig_ManPartitionPrint( p, vPartsAll, vPartSuppsAll ); 00659 printf( "Created %d partitions.\n", Vec_PtrSize(vPartsAll) ); 00660 00661 if ( fVerbose ) 00662 { 00663 //PRT( "Comps", clock() - clk ); 00664 } 00665 00666 // cleanup 00667 Vec_VecFree( (Vec_Vec_t *)vSupports ); 00668 if ( pvPartSupps == NULL ) 00669 Vec_VecFree( (Vec_Vec_t *)vPartSuppsAll ); 00670 else 00671 *pvPartSupps = vPartSuppsAll; 00672 /* 00673 // converts from intergers to nodes 00674 Vec_PtrForEachEntry( vPartsAll, vPart, iPart ) 00675 { 00676 vPartPtr = Vec_PtrAlloc( Vec_IntSize(vPart) ); 00677 Vec_IntForEachEntry( vPart, iOut, i ) 00678 Vec_PtrPush( vPartPtr, Aig_ManPo(p, iOut) ); 00679 Vec_IntFree( vPart ); 00680 Vec_PtrWriteEntry( vPartsAll, iPart, vPartPtr ); 00681 } 00682 */ 00683 return vPartsAll; 00684 }
Definition at line 199 of file aig.h.
00199 { return (Aig_Obj_t *)Vec_PtrEntry(p->vPis, i); }
| static int Aig_ManPiNum | ( | Aig_Man_t * | p | ) | [inline, static] |
Definition at line 184 of file aig.h.
00184 { return p->nObjs[AIG_OBJ_PI]; }
Definition at line 200 of file aig.h.
00200 { return (Aig_Obj_t *)Vec_PtrEntry(p->vPos, i); }
| static int Aig_ManPoNum | ( | Aig_Man_t * | p | ) | [inline, static] |
Definition at line 185 of file aig.h.
00185 { return p->nObjs[AIG_OBJ_PO]; }
| void Aig_ManPrintStats | ( | Aig_Man_t * | p | ) |
Function*************************************************************
Synopsis [Stops the AIG manager.]
Description []
SideEffects []
SeeAlso []
Definition at line 302 of file aigMan.c.
00303 { 00304 printf( "PI/PO/Lat = %5d/%5d/%5d ", Aig_ManPiNum(p), Aig_ManPoNum(p), Aig_ManLatchNum(p) ); 00305 printf( "A = %7d. ", Aig_ManAndNum(p) ); 00306 if ( Aig_ManExorNum(p) ) 00307 printf( "X = %5d. ", Aig_ManExorNum(p) ); 00308 // if ( Aig_ManBufNum(p) ) 00309 printf( "B = %5d. ", Aig_ManBufNum(p) ); 00310 // printf( "Cre = %6d. ", p->nCreated ); 00311 // printf( "Del = %6d. ", p->nDeleted ); 00312 // printf( "Lev = %3d. ", Aig_ManCountLevels(p) ); 00313 printf( "Max = %7d. ", Aig_ManObjNumMax(p) ); 00314 printf( "Lev = %3d. ", Aig_ManLevels(p) ); 00315 if ( Aig_ManRegNum(p) ) 00316 printf( "Lat = %5d. ", Aig_ManRegNum(p) ); 00317 printf( "\n" ); 00318 fflush( stdout ); 00319 }
| void Aig_ManPrintVerbose | ( | Aig_Man_t * | p, | |
| int | fHaig | |||
| ) |
Function*************************************************************
Synopsis [Prints node in HAIG.]
Description []
SideEffects []
SeeAlso []
Definition at line 614 of file aigUtil.c.
00615 { 00616 Vec_Ptr_t * vNodes; 00617 Aig_Obj_t * pObj; 00618 int i; 00619 printf( "PIs: " ); 00620 Aig_ManForEachPi( p, pObj, i ) 00621 printf( " %p", pObj ); 00622 printf( "\n" ); 00623 vNodes = Aig_ManDfs( p ); 00624 Vec_PtrForEachEntry( vNodes, pObj, i ) 00625 Aig_ObjPrintVerbose( pObj, fHaig ), printf( "\n" ); 00626 printf( "\n" ); 00627 }
Definition at line 296 of file aig.h.
00297 { 00298 extern void Aig_MmFixedEntryRecycle( Aig_MmFixed_t * p, char * pEntry ); 00299 assert( pEntry->nRefs == 0 ); 00300 pEntry->Type = AIG_OBJ_NONE; // distinquishes a dead node from a live node 00301 Aig_MmFixedEntryRecycle( p->pMemObjs, (char *)pEntry ); 00302 p->nDeleted++; 00303 }
Function*************************************************************
Synopsis [Reduces the latches.]
Description []
SideEffects []
SeeAlso []
Definition at line 366 of file aigScl.c.
00367 { 00368 Aig_Man_t * pTemp; 00369 Vec_Ptr_t * vMap; 00370 int nSaved, nCur; 00371 for ( nSaved = 0; (nCur = Aig_ManReduceLachesCount(p)); nSaved += nCur ) 00372 { 00373 if ( fVerbose ) 00374 { 00375 printf( "Saved = %5d. ", nCur ); 00376 printf( "RBeg = %5d. NBeg = %6d. ", Aig_ManRegNum(p), Aig_ManNodeNum(p) ); 00377 } 00378 vMap = Aig_ManReduceLachesOnce( p ); 00379 p = Aig_ManRemap( pTemp = p, vMap ); 00380 Aig_ManStop( pTemp ); 00381 Vec_PtrFree( vMap ); 00382 Aig_ManSeqCleanup( p ); 00383 if ( fVerbose ) 00384 { 00385 printf( "REnd = %5d. NEnd = %6d. ", Aig_ManRegNum(p), Aig_ManNodeNum(p) ); 00386 printf( "\n" ); 00387 } 00388 if ( p->nRegs == 0 ) 00389 break; 00390 } 00391 return p; 00392 }
| static int Aig_ManRegNum | ( | Aig_Man_t * | p | ) | [inline, static] |
Function*************************************************************
Synopsis [Iteratively rehashes the AIG.]
Description [The input AIG is assumed to have representatives assigned.]
SideEffects []
SeeAlso []
Definition at line 390 of file aigRepr.c.
00391 { 00392 Aig_Man_t * pTemp; 00393 int i, nFanouts; 00394 assert( p->pReprs != NULL ); 00395 for ( i = 0; (nFanouts = Aig_ManRemapRepr( p )); i++ ) 00396 { 00397 // printf( "Iter = %3d. Fanouts = %6d. Nodes = %7d.\n", i+1, nFanouts, Aig_ManNodeNum(p) ); 00398 p = Aig_ManDupRepr( pTemp = p, 1 ); 00399 Aig_ManReprStart( p, Aig_ManObjNumMax(p) ); 00400 Aig_ManTransferRepr( p, pTemp ); 00401 Aig_ManStop( pTemp ); 00402 } 00403 return p; 00404 }
CFile****************************************************************
FileName [aigScl.c]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [AIG package.]
Synopsis [Sequential cleanup.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - April 28, 2007.]
Revision [
- Id
- aigScl.c,v 1.00 2007/04/28 00:00:00 alanmi Exp
] DECLARATIONS /// FUNCTION DEFINITIONS ///Function*************************************************************
Synopsis [Remaps the manager.]
Description [Map in the array specifies for each CI nodes the node that should be used after remapping.]
SideEffects []
SeeAlso []
Definition at line 43 of file aigScl.c.
00044 { 00045 Aig_Man_t * pNew; 00046 Aig_Obj_t * pObj, * pObjMapped; 00047 int i; 00048 // create the new manager 00049 pNew = Aig_ManStart( Aig_ManObjNumMax(p) ); 00050 pNew->pName = Aig_UtilStrsav( p->pName ); 00051 pNew->nRegs = p->nRegs; 00052 pNew->nAsserts = p->nAsserts; 00053 if ( p->vFlopNums ) 00054 pNew->vFlopNums = Vec_IntDup( p->vFlopNums ); 00055 // create the PIs 00056 Aig_ManCleanData( p ); 00057 Aig_ManConst1(p)->pData = Aig_ManConst1(pNew); 00058 Aig_ManForEachPi( p, pObj, i ) 00059 pObj->pData = Aig_ObjCreatePi(pNew); 00060 // implement the mapping 00061 Aig_ManForEachPi( p, pObj, i ) 00062 { 00063 pObjMapped = Vec_PtrEntry( vMap, i ); 00064 pObj->pData = Aig_NotCond( Aig_Regular(pObjMapped)->pData, Aig_IsComplement(pObjMapped) ); 00065 } 00066 // duplicate internal nodes 00067 Aig_ManForEachObj( p, pObj, i ) 00068 if ( Aig_ObjIsBuf(pObj) ) 00069 pObj->pData = Aig_ObjChild0Copy(pObj); 00070 else if ( Aig_ObjIsNode(pObj) ) 00071 pObj->pData = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) ); 00072 // add the POs 00073 Aig_ManForEachPo( p, pObj, i ) 00074 Aig_ObjCreatePo( pNew, Aig_ObjChild0Copy(pObj) ); 00075 assert( Aig_ManNodeNum(p) >= Aig_ManNodeNum(pNew) ); 00076 // check the resulting network 00077 if ( !Aig_ManCheck(pNew) ) 00078 printf( "Aig_ManDup(): The check has failed.\n" ); 00079 return pNew; 00080 }
| void Aig_ManReprStart | ( | Aig_Man_t * | p, | |
| int | nIdMax | |||
| ) |
CFile****************************************************************
FileName [aigRepr.c]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [AIG package.]
Synopsis [Handing node representatives.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - April 28, 2007.]
Revision [
- Id
- aigRepr.c,v 1.00 2007/04/28 00:00:00 alanmi Exp
] DECLARATIONS /// FUNCTION DEFINITIONS ///Function*************************************************************
Synopsis [Starts the array of representatives.]
Description []
SideEffects []
SeeAlso []
Definition at line 42 of file aigRepr.c.
00043 { 00044 assert( Aig_ManBufNum(p) == 0 ); 00045 assert( p->pReprs == NULL ); 00046 p->nReprsAlloc = nIdMax; 00047 p->pReprs = ALLOC( Aig_Obj_t *, p->nReprsAlloc ); 00048 memset( p->pReprs, 0, sizeof(Aig_Obj_t *) * p->nReprsAlloc ); 00049 }
| void Aig_ManReprStop | ( | Aig_Man_t * | p | ) |
| void Aig_ManResetRefs | ( | Aig_Man_t * | p | ) |
Function*************************************************************
Synopsis [Reset reference counters.]
Description []
SideEffects []
SeeAlso []
Definition at line 116 of file aigUtil.c.
00117 { 00118 Aig_Obj_t * pObj; 00119 int i; 00120 Aig_ManForEachObj( p, pObj, i ) 00121 pObj->nRefs = 0; 00122 Aig_ManForEachObj( p, pObj, i ) 00123 { 00124 if ( Aig_ObjFanin0(pObj) ) 00125 Aig_ObjFanin0(pObj)->nRefs++; 00126 if ( Aig_ObjFanin1(pObj) ) 00127 Aig_ObjFanin1(pObj)->nRefs++; 00128 } 00129 }
| int Aig_ManSeqCleanup | ( | Aig_Man_t * | p | ) |
Function*************************************************************
Synopsis [Returns the number of dangling nodes removed.]
Description []
SideEffects []
SeeAlso []
Definition at line 125 of file aigScl.c.
00126 { 00127 Vec_Ptr_t * vNodes, * vCis, * vCos; 00128 Aig_Obj_t * pObj, * pObjLi, * pObjLo; 00129 int i, nTruePis, nTruePos; 00130 assert( Aig_ManBufNum(p) == 0 ); 00131 00132 // mark the PIs 00133 Aig_ManIncrementTravId( p ); 00134 Aig_ObjSetTravIdCurrent( p, Aig_ManConst1(p) ); 00135 Aig_ManForEachPiSeq( p, pObj, i ) 00136 Aig_ObjSetTravIdCurrent( p, pObj ); 00137 00138 // prepare to collect nodes reachable from POs 00139 vNodes = Vec_PtrAlloc( 100 ); 00140 Aig_ManForEachPoSeq( p, pObj, i ) 00141 Vec_PtrPush( vNodes, pObj ); 00142 00143 // remember latch inputs in latch outputs 00144 Aig_ManForEachLiLoSeq( p, pObjLi, pObjLo, i ) 00145 pObjLo->pNext = pObjLi; 00146 // mark the nodes reachable from these nodes 00147 Vec_PtrForEachEntry( vNodes, pObj, i ) 00148 Aig_ManSeqCleanup_rec( p, pObj, vNodes ); 00149 assert( Vec_PtrSize(vNodes) <= Aig_ManPoNum(p) ); 00150 // clean latch output pointers 00151 Aig_ManForEachLiLoSeq( p, pObjLi, pObjLo, i ) 00152 pObjLo->pNext = NULL; 00153 00154 // if some latches are removed, update PIs/POs 00155 if ( Vec_PtrSize(vNodes) < Aig_ManPoNum(p) ) 00156 { 00157 if ( p->vFlopNums ) 00158 { 00159 int nTruePos = Aig_ManPoNum(p)-Aig_ManRegNum(p); 00160 // remember numbers of flops in the flops 00161 Aig_ManForEachLiSeq( p, pObj, i ) 00162 pObj->pNext = (Aig_Obj_t *)(long)Vec_IntEntry( p->vFlopNums, i - nTruePos ); 00163 // reset the flop numbers 00164 Vec_PtrForEachEntryStart( vNodes, pObj, i, nTruePos ) 00165 Vec_IntWriteEntry( p->vFlopNums, i - nTruePos, (int)(long)pObj->pNext ); 00166 Vec_IntShrink( p->vFlopNums, Vec_PtrSize(vNodes) - nTruePos ); 00167 // clean the next pointer 00168 Aig_ManForEachLiSeq( p, pObj, i ) 00169 pObj->pNext = NULL; 00170 } 00171 // collect new CIs/COs 00172 vCis = Vec_PtrAlloc( Aig_ManPiNum(p) ); 00173 Aig_ManForEachPi( p, pObj, i ) 00174 if ( Aig_ObjIsTravIdCurrent(p, pObj) ) 00175 Vec_PtrPush( vCis, pObj ); 00176 else 00177 { 00178 Vec_PtrWriteEntry( p->vObjs, pObj->Id, NULL ); 00179 // Aig_ManRecycleMemory( p, pObj ); 00180 } 00181 vCos = Vec_PtrAlloc( Aig_ManPoNum(p) ); 00182 Aig_ManForEachPo( p, pObj, i ) 00183 if ( Aig_ObjIsTravIdCurrent(p, pObj) ) 00184 Vec_PtrPush( vCos, pObj ); 00185 else 00186 { 00187 Aig_ObjDisconnect( p, pObj ); 00188 Vec_PtrWriteEntry( p->vObjs, pObj->Id, NULL ); 00189 // Aig_ManRecycleMemory( p, pObj ); 00190 } 00191 // remember the number of true PIs/POs 00192 nTruePis = Aig_ManPiNum(p) - Aig_ManRegNum(p); 00193 nTruePos = Aig_ManPoNum(p) - Aig_ManRegNum(p); 00194 // set the new number of registers 00195 p->nRegs -= Aig_ManPoNum(p) - Vec_PtrSize(vNodes); 00196 // create new PIs/POs 00197 assert( Vec_PtrSize(vCis) == nTruePis + p->nRegs ); 00198 assert( Vec_PtrSize(vCos) == nTruePos + p->nRegs ); 00199 Vec_PtrFree( p->vPis ); p->vPis = vCis; 00200 Vec_PtrFree( p->vPos ); p->vPos = vCos; 00201 p->nObjs[AIG_OBJ_PI] = Vec_PtrSize( p->vPis ); 00202 p->nObjs[AIG_OBJ_PO] = Vec_PtrSize( p->vPos ); 00203 00204 } 00205 Vec_PtrFree( vNodes ); 00206 // remove dangling nodes 00207 return Aig_ManCleanup( p ); 00208 }
| int Aig_ManSeqStrash | ( | Aig_Man_t * | p, | |
| int | nLatches, | |||
| int * | pInits | |||
| ) |
Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
Definition at line 439 of file aigSeq.c.
00440 { 00441 Vec_Ptr_t * vNodes, * vUnreach; 00442 // Aig_Obj_t * pObj, * pFanin; 00443 // int i; 00444 int Iter, RetValue = 1; 00445 00446 // create latches out of the additional PI/PO pairs 00447 Aig_ManSeqStrashConvert( p, nLatches, pInits ); 00448 00449 // iteratively rehash the network 00450 for ( Iter = 0; RetValue; Iter++ ) 00451 { 00452 // Aig_ManPrintStats( p ); 00453 /* 00454 Aig_ManForEachObj( p, pObj, i ) 00455 { 00456 assert( pObj->Type > 0 ); 00457 pFanin = Aig_ObjFanin0(pObj); 00458 assert( pFanin == NULL || pFanin->Type > 0 ); 00459 pFanin = Aig_ObjFanin1(pObj); 00460 assert( pFanin == NULL || pFanin->Type > 0 ); 00461 } 00462 */ 00463 // mark nodes unreachable from the PIs 00464 vUnreach = Aig_ManDfsUnreach( p ); 00465 if ( Iter == 0 && Vec_PtrSize(vUnreach) > 0 ) 00466 printf( "Unreachable objects = %d.\n", Vec_PtrSize(vUnreach) ); 00467 // collect nodes reachable from the POs 00468 vNodes = Aig_ManDfsSeq( p ); 00469 // remove nodes unreachable from the POs 00470 if ( Iter == 0 ) 00471 Aig_ManRemoveUnmarked( p ); 00472 // continue rehashing as long as there are changes 00473 RetValue = Aig_ManSeqRehashOne( p, vNodes, vUnreach ); 00474 Vec_PtrFree( vNodes ); 00475 Vec_PtrFree( vUnreach ); 00476 } 00477 00478 // perform the final cleanup 00479 Aig_ManIncrementTravId( p ); 00480 vNodes = Aig_ManDfsSeq( p ); 00481 Aig_ManRemoveUnmarked( p ); 00482 Vec_PtrFree( vNodes ); 00483 // remove buffers if they are left 00484 // Aig_ManRemoveBuffers( p ); 00485 00486 // clean up 00487 if ( !Aig_ManCheck( p ) ) 00488 { 00489 printf( "Aig_ManSeqStrash: The network check has failed.\n" ); 00490 return 0; 00491 } 00492 return 1; 00493 00494 }
Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
Definition at line 329 of file aigShow.c.
00330 { 00331 extern void Abc_ShowFile( char * FileNameDot ); 00332 static Counter = 0; 00333 char FileNameDot[200]; 00334 FILE * pFile; 00335 // create the file name 00336 // Aig_ShowGetFileName( pMan->pName, FileNameDot ); 00337 sprintf( FileNameDot, "temp%02d.dot", Counter++ ); 00338 // check that the file can be opened 00339 if ( (pFile = fopen( FileNameDot, "w" )) == NULL ) 00340 { 00341 fprintf( stdout, "Cannot open the intermediate file \"%s\".\n", FileNameDot ); 00342 return; 00343 } 00344 fclose( pFile ); 00345 // generate the file 00346 Aig_WriteDotAig( pMan, FileNameDot, fHaig, vBold ); 00347 // visualize the file 00348 Abc_ShowFile( FileNameDot ); 00349 }
| Aig_Man_t* Aig_ManStart | ( | int | nNodesMax | ) |
CFile****************************************************************
FileName [aigMan.c]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [AIG package.]
Synopsis [AIG manager.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - April 28, 2007.]
Revision [
- Id
- aigMan.c,v 1.00 2007/04/28 00:00:00 alanmi Exp
] DECLARATIONS /// FUNCTION DEFINITIONS ///Function*************************************************************
Synopsis [Starts the AIG manager.]
Description [The argument of this procedure is a soft limit on the the number of nodes, or 0 if the limit is unknown.]
SideEffects []
SeeAlso []
Definition at line 43 of file aigMan.c.
00044 { 00045 Aig_Man_t * p; 00046 if ( nNodesMax <= 0 ) 00047 nNodesMax = 10007; 00048 // start the manager 00049 p = ALLOC( Aig_Man_t, 1 ); 00050 memset( p, 0, sizeof(Aig_Man_t) ); 00051 // perform initializations 00052 p->nTravIds = 1; 00053 p->fCatchExor = 0; 00054 // allocate arrays for nodes 00055 p->vPis = Vec_PtrAlloc( 100 ); 00056 p->vPos = Vec_PtrAlloc( 100 ); 00057 p->vObjs = Vec_PtrAlloc( 1000 ); 00058 p->vBufs = Vec_PtrAlloc( 100 ); 00059 // prepare the internal memory manager 00060 p->pMemObjs = Aig_MmFixedStart( sizeof(Aig_Obj_t), nNodesMax ); 00061 // create the constant node 00062 p->pConst1 = Aig_ManFetchMemory( p ); 00063 p->pConst1->Type = AIG_OBJ_CONST1; 00064 p->pConst1->fPhase = 1; 00065 p->nObjs[AIG_OBJ_CONST1]++; 00066 // start the table 00067 p->nTableSize = Aig_PrimeCudd( nNodesMax ); 00068 p->pTable = ALLOC( Aig_Obj_t *, p->nTableSize ); 00069 memset( p->pTable, 0, sizeof(Aig_Obj_t *) * p->nTableSize ); 00070 return p; 00071 }
Function*************************************************************
Synopsis [Duplicates the AIG manager.]
Description []
SideEffects []
SeeAlso []
Definition at line 84 of file aigMan.c.
00085 { 00086 Aig_Man_t * pNew; 00087 Aig_Obj_t * pObj; 00088 int i; 00089 // create the new manager 00090 pNew = Aig_ManStart( Aig_ManObjNumMax(p) ); 00091 pNew->pName = Aig_UtilStrsav( p->pName ); 00092 // create the PIs 00093 Aig_ManConst1(p)->pData = Aig_ManConst1(pNew); 00094 Aig_ManForEachPi( p, pObj, i ) 00095 pObj->pData = Aig_ObjCreatePi(pNew); 00096 return pNew; 00097 }
| void Aig_ManStartMemory | ( | Aig_Man_t * | p | ) |
| void Aig_ManStartReverseLevels | ( | Aig_Man_t * | p, | |
| int | nMaxLevelIncrease | |||
| ) |
Function*************************************************************
Synopsis [Prepares for the computation of required levels.]
Description [This procedure should be called before the required times are used. It starts internal data structures, which records the level from the COs of the network nodes in reverse topologogical order.]
SideEffects []
SeeAlso []
Definition at line 139 of file aigTiming.c.
00140 { 00141 Vec_Ptr_t * vNodes; 00142 Aig_Obj_t * pObj; 00143 int i; 00144 assert( p->pFanData != NULL ); 00145 assert( p->vLevelR == NULL ); 00146 // remember the maximum number of direct levels 00147 p->nLevelMax = Aig_ManLevels(p) + nMaxLevelIncrease; 00148 // start the reverse levels 00149 p->vLevelR = Vec_IntAlloc( 0 ); 00150 Vec_IntFill( p->vLevelR, Aig_ManObjNumMax(p), 0 ); 00151 // compute levels in reverse topological order 00152 vNodes = Aig_ManDfsReverse( p ); 00153 Vec_PtrForEachEntry( vNodes, pObj, i ) 00154 { 00155 assert( pObj->fMarkA == 0 ); 00156 Aig_ObjSetReverseLevel( p, pObj, Aig_ObjReverseLevelNew(p, pObj) ); 00157 } 00158 Vec_PtrFree( vNodes ); 00159 }
| void Aig_ManStop | ( | Aig_Man_t * | p | ) |
Function*************************************************************
Synopsis [Stops the AIG manager.]
Description []
SideEffects []
SeeAlso []
Definition at line 227 of file aigMan.c.
00228 { 00229 Aig_Obj_t * pObj; 00230 int i; 00231 if ( p->vMapped ) 00232 Vec_PtrFree( p->vMapped ); 00233 // print time 00234 if ( p->time1 ) { PRT( "time1", p->time1 ); } 00235 if ( p->time2 ) { PRT( "time2", p->time2 ); } 00236 // delete timing 00237 if ( p->pManTime ) 00238 Aig_TManStop( p->pManTime ); 00239 // delete fanout 00240 if ( p->pFanData ) 00241 Aig_ManFanoutStop( p ); 00242 // make sure the nodes have clean marks 00243 Aig_ManForEachObj( p, pObj, i ) 00244 assert( !pObj->fMarkA && !pObj->fMarkB ); 00245 // Aig_TableProfile( p ); 00246 Aig_MmFixedStop( p->pMemObjs, 0 ); 00247 if ( p->vPis ) Vec_PtrFree( p->vPis ); 00248 if ( p->vPos ) Vec_PtrFree( p->vPos ); 00249 if ( p->vObjs ) Vec_PtrFree( p->vObjs ); 00250 if ( p->vBufs ) Vec_PtrFree( p->vBufs ); 00251 if ( p->vLevelR ) Vec_IntFree( p->vLevelR ); 00252 if ( p->vLevels ) Vec_VecFree( p->vLevels ); 00253 if ( p->vFlopNums) Vec_IntFree( p->vFlopNums ); 00254 FREE( p->pName ); 00255 FREE( p->pObjCopies ); 00256 FREE( p->pReprs ); 00257 FREE( p->pEquivs ); 00258 free( p->pTable ); 00259 free( p ); 00260 }
| void Aig_ManStopMemory | ( | Aig_Man_t * | p | ) |
| void Aig_ManStopReverseLevels | ( | Aig_Man_t * | p | ) |
Function*************************************************************
Synopsis [Cleans the data structures used to compute required levels.]
Description []
SideEffects []
SeeAlso []
Definition at line 172 of file aigTiming.c.
Function*************************************************************
Synopsis [Computes supports of the POs in the multi-output AIG.]
Description []
SideEffects []
SeeAlso []
Definition at line 267 of file aigPart.c.
00268 { 00269 Vec_Ptr_t * vSupports; 00270 Vec_Int_t * vSupp; 00271 Part_Man_t * p; 00272 Part_One_t * pPart0, * pPart1; 00273 Aig_Obj_t * pObj; 00274 int i; 00275 // set the number of PIs/POs 00276 Aig_ManForEachPi( pMan, pObj, i ) 00277 pObj->pNext = (Aig_Obj_t *)(long)i; 00278 Aig_ManForEachPo( pMan, pObj, i ) 00279 pObj->pNext = (Aig_Obj_t *)(long)i; 00280 // start the support computation manager 00281 p = Part_ManStart( 1 << 20, 1 << 6 ); 00282 // consider objects in the topological order 00283 vSupports = Vec_PtrAlloc( Aig_ManPoNum(pMan) ); 00284 Aig_ManCleanData(pMan); 00285 Aig_ManForEachObj( pMan, pObj, i ) 00286 { 00287 if ( Aig_ObjIsNode(pObj) ) 00288 { 00289 pPart0 = Aig_ObjFanin0(pObj)->pData; 00290 pPart1 = Aig_ObjFanin1(pObj)->pData; 00291 pObj->pData = Part_ManMergeEntry( p, pPart0, pPart1, pObj->nRefs ); 00292 assert( pPart0->nRefs > 0 ); 00293 if ( --pPart0->nRefs == 0 ) 00294 Part_ManRecycleEntry( p, pPart0 ); 00295 assert( pPart1->nRefs > 0 ); 00296 if ( --pPart1->nRefs == 0 ) 00297 Part_ManRecycleEntry( p, pPart1 ); 00298 continue; 00299 } 00300 if ( Aig_ObjIsPo(pObj) ) 00301 { 00302 pPart0 = Aig_ObjFanin0(pObj)->pData; 00303 vSupp = Part_ManTransferEntry(pPart0); 00304 Vec_IntPush( vSupp, (int)(long)pObj->pNext ); 00305 Vec_PtrPush( vSupports, vSupp ); 00306 assert( pPart0->nRefs > 0 ); 00307 if ( --pPart0->nRefs == 0 ) 00308 Part_ManRecycleEntry( p, pPart0 ); 00309 continue; 00310 } 00311 if ( Aig_ObjIsPi(pObj) ) 00312 { 00313 if ( pObj->nRefs ) 00314 { 00315 pPart0 = Part_ManFetchEntry( p, 1, pObj->nRefs ); 00316 pPart0->pOuts[ pPart0->nOuts++ ] = (int)(long)pObj->pNext; 00317 pObj->pData = pPart0; 00318 } 00319 continue; 00320 } 00321 if ( Aig_ObjIsConst1(pObj) ) 00322 { 00323 if ( pObj->nRefs ) 00324 pObj->pData = Part_ManFetchEntry( p, 0, pObj->nRefs ); 00325 continue; 00326 } 00327 assert( 0 ); 00328 } 00329 //printf( "Memory usage = %d Mb.\n", Vec_PtrSize(p->vMemory) * p->nChunkSize / (1<<20) ); 00330 Part_ManStop( p ); 00331 // sort supports by size 00332 Vec_VecSort( (Vec_Vec_t *)vSupports, 1 ); 00333 // clear the number of PIs/POs 00334 Aig_ManForEachPi( pMan, pObj, i ) 00335 pObj->pNext = NULL; 00336 Aig_ManForEachPo( pMan, pObj, i ) 00337 pObj->pNext = NULL; 00338 /* 00339 Aig_ManForEachPo( pMan, pObj, i ) 00340 printf( "%d ", Vec_IntSize( (Vec_Int_t *)Vec_VecEntry(vSupports, i) ) ); 00341 printf( "\n" ); 00342 */ 00343 return vSupports; 00344 }
Function*************************************************************
Synopsis [Duplicates AIG while substituting representatives.]
Description []
SideEffects []
SeeAlso []
Definition at line 208 of file aigRepr.c.
00209 { 00210 Aig_Obj_t * pObj, * pRepr; 00211 int k; 00212 assert( pNew->pReprs != NULL ); 00213 // extend storage to fix pNew 00214 if ( pNew->nReprsAlloc < Aig_ManObjNumMax(pNew) ) 00215 { 00216 int nReprsAllocNew = 2 * Aig_ManObjNumMax(pNew); 00217 pNew->pReprs = REALLOC( Aig_Obj_t *, pNew->pReprs, nReprsAllocNew ); 00218 memset( pNew->pReprs + pNew->nReprsAlloc, 0, sizeof(Aig_Obj_t *) * (nReprsAllocNew-pNew->nReprsAlloc) ); 00219 pNew->nReprsAlloc = nReprsAllocNew; 00220 } 00221 // go through the nodes which have representatives 00222 Aig_ManForEachObj( pOld, pObj, k ) 00223 if ( (pRepr = Aig_ObjFindRepr(pOld, pObj)) ) 00224 Aig_ObjSetRepr( pNew, Aig_Regular(pRepr->pData), Aig_Regular(pObj->pData) ); 00225 }
Function*************************************************************
Synopsis [Incrementally updates level of the nodes.]
Description []
SideEffects []
SeeAlso []
Definition at line 192 of file aigTiming.c.
00193 { 00194 Aig_Obj_t * pFanout, * pTemp; 00195 int iFanout = -1, LevelOld, Lev, k, m; 00196 assert( p->pFanData != NULL ); 00197 assert( Aig_ObjIsNode(pObjNew) ); 00198 // allocate level if needed 00199 if ( p->vLevels == NULL ) 00200 p->vLevels = Vec_VecAlloc( Aig_ManLevels(p) + 8 ); 00201 // check if level has changed 00202 LevelOld = Aig_ObjLevel(pObjNew); 00203 if ( LevelOld == Aig_ObjLevelNew(pObjNew) ) 00204 return; 00205 // start the data structure for level update 00206 // we cannot fail to visit a node when using this structure because the 00207 // nodes are stored by their _old_ levels, which are assumed to be correct 00208 Vec_VecClear( p->vLevels ); 00209 Vec_VecPush( p->vLevels, LevelOld, pObjNew ); 00210 pObjNew->fMarkA = 1; 00211 // recursively update level 00212 Vec_VecForEachEntryStart( p->vLevels, pTemp, Lev, k, LevelOld ) 00213 { 00214 pTemp->fMarkA = 0; 00215 assert( Aig_ObjLevel(pTemp) == Lev ); 00216 pTemp->Level = Aig_ObjLevelNew(pTemp); 00217 // if the level did not change, no need to check the fanout levels 00218 if ( Aig_ObjLevel(pTemp) == Lev ) 00219 continue; 00220 // schedule fanout for level update 00221 Aig_ObjForEachFanout( p, pTemp, pFanout, iFanout, m ) 00222 { 00223 if ( Aig_ObjIsNode(pFanout) && !pFanout->fMarkA ) 00224 { 00225 assert( Aig_ObjLevel(pFanout) >= Lev ); 00226 Vec_VecPush( p->vLevels, Aig_ObjLevel(pFanout), pFanout ); 00227 pFanout->fMarkA = 1; 00228 } 00229 } 00230 } 00231 }
Function*************************************************************
Synopsis [Incrementally updates level of the nodes.]
Description []
SideEffects []
SeeAlso []
Definition at line 244 of file aigTiming.c.
00245 { 00246 Aig_Obj_t * pFanin, * pTemp; 00247 int LevelOld, LevFanin, Lev, k; 00248 assert( p->vLevelR != NULL ); 00249 assert( Aig_ObjIsNode(pObjNew) ); 00250 // allocate level if needed 00251 if ( p->vLevels == NULL ) 00252 p->vLevels = Vec_VecAlloc( Aig_ManLevels(p) + 8 ); 00253 // check if level has changed 00254 LevelOld = Aig_ObjReverseLevel(p, pObjNew); 00255 if ( LevelOld == Aig_ObjReverseLevelNew(p, pObjNew) ) 00256 return; 00257 // start the data structure for level update 00258 // we cannot fail to visit a node when using this structure because the 00259 // nodes are stored by their _old_ levels, which are assumed to be correct 00260 Vec_VecClear( p->vLevels ); 00261 Vec_VecPush( p->vLevels, LevelOld, pObjNew ); 00262 pObjNew->fMarkA = 1; 00263 // recursively update level 00264 Vec_VecForEachEntryStart( p->vLevels, pTemp, Lev, k, LevelOld ) 00265 { 00266 pTemp->fMarkA = 0; 00267 LevelOld = Aig_ObjReverseLevel(p, pTemp); 00268 assert( LevelOld == Lev ); 00269 Aig_ObjSetReverseLevel( p, pTemp, Aig_ObjReverseLevelNew(p, pTemp) ); 00270 // if the level did not change, to need to check the fanout levels 00271 if ( Aig_ObjReverseLevel(p, pTemp) == Lev ) 00272 continue; 00273 // schedule fanins for level update 00274 pFanin = Aig_ObjFanin0(pTemp); 00275 if ( Aig_ObjIsNode(pFanin) && !pFanin->fMarkA ) 00276 { 00277 LevFanin = Aig_ObjReverseLevel( p, pFanin ); 00278 assert( LevFanin >= Lev ); 00279 Vec_VecPush( p->vLevels, LevFanin, pFanin ); 00280 pFanin->fMarkA = 1; 00281 } 00282 pFanin = Aig_ObjFanin1(pTemp); 00283 if ( Aig_ObjIsNode(pFanin) && !pFanin->fMarkA ) 00284 { 00285 LevFanin = Aig_ObjReverseLevel( p, pFanin ); 00286 assert( LevFanin >= Lev ); 00287 Vec_VecPush( p->vLevels, LevFanin, pFanin ); 00288 pFanin->fMarkA = 1; 00289 } 00290 } 00291 }
| void Aig_ManVerifyLevel | ( | Aig_Man_t * | p | ) |
Function*************************************************************
Synopsis [Verifies direct level of the nodes.]
Description []
SideEffects []
SeeAlso []
Definition at line 304 of file aigTiming.c.
00305 { 00306 Aig_Obj_t * pObj; 00307 int i, Counter = 0; 00308 assert( p->pFanData ); 00309 Aig_ManForEachNode( p, pObj, i ) 00310 if ( Aig_ObjLevel(pObj) != Aig_ObjLevelNew(pObj) ) 00311 { 00312 printf( "Level of node %6d should be %4d instead of %4d.\n", 00313 pObj->Id, Aig_ObjLevelNew(pObj), Aig_ObjLevel(pObj) ); 00314 Counter++; 00315 } 00316 if ( Counter ) 00317 printf( "Levels of %d nodes are incorrect.\n", Counter ); 00318 }
| void Aig_ManVerifyReverseLevel | ( | Aig_Man_t * | p | ) |
Function*************************************************************
Synopsis [Verifies reverse level of the nodes.]
Description []
SideEffects []
SeeAlso []
Definition at line 331 of file aigTiming.c.
00332 { 00333 Aig_Obj_t * pObj; 00334 int i, Counter = 0; 00335 assert( p->vLevelR ); 00336 Aig_ManForEachNode( p, pObj, i ) 00337 if ( Aig_ObjLevel(pObj) != Aig_ObjLevelNew(pObj) ) 00338 { 00339 printf( "Reverse level of node %6d should be %4d instead of %4d.\n", 00340 pObj->Id, Aig_ObjReverseLevelNew(p, pObj), Aig_ObjReverseLevel(p, pObj) ); 00341 Counter++; 00342 } 00343 if ( Counter ) 00344 printf( "Reverse levels of %d nodes are incorrect.\n", Counter ); 00345 }
Function*************************************************************
Synopsis [Implements the miter.]
Description []
SideEffects []
SeeAlso []
Definition at line 433 of file aigOper.c.
00434 { 00435 int i; 00436 assert( vPairs->nSize > 0 ); 00437 assert( vPairs->nSize % 2 == 0 ); 00438 for ( i = 0; i < vPairs->nSize; i += 2 ) 00439 vPairs->pArray[i/2] = Aig_Not( Aig_Exor( p, vPairs->pArray[i], vPairs->pArray[i+1] ) ); 00440 vPairs->nSize = vPairs->nSize/2; 00441 return Aig_Not( Aig_Multi_rec( p, (Aig_Obj_t **)vPairs->pArray, vPairs->nSize, AIG_OBJ_AND ) ); 00442 }
Function*************************************************************
Synopsis [Implements the miter.]
Description []
SideEffects []
SeeAlso []
Definition at line 455 of file aigOper.c.
00456 { 00457 int i; 00458 assert( vNodes1->nSize > 0 && vNodes1->nSize > 0 ); 00459 assert( vNodes1->nSize == vNodes2->nSize ); 00460 for ( i = 0; i < vNodes1->nSize; i++ ) 00461 vNodes1->pArray[i] = Aig_Not( Aig_Exor( p, vNodes1->pArray[i], vNodes2->pArray[i] ) ); 00462 return Aig_Not( Aig_Multi_rec( p, (Aig_Obj_t **)vNodes1->pArray, vNodes1->nSize, AIG_OBJ_AND ) ); 00463 }
| char* Aig_MmFixedEntryFetch | ( | Aig_MmFixed_t * | p | ) |
Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
Definition at line 160 of file aigMem.c.
00161 { 00162 char * pTemp; 00163 int i; 00164 00165 // check if there are still free entries 00166 if ( p->nEntriesUsed == p->nEntriesAlloc ) 00167 { // need to allocate more entries 00168 assert( p->pEntriesFree == NULL ); 00169 if ( p->nChunks == p->nChunksAlloc ) 00170 { 00171 p->nChunksAlloc *= 2; 00172 p->pChunks = REALLOC( char *, p->pChunks, p->nChunksAlloc ); 00173 } 00174 p->pEntriesFree = ALLOC( char, p->nEntrySize * p->nChunkSize ); 00175 p->nMemoryAlloc += p->nEntrySize * p->nChunkSize; 00176 // transform these entries into a linked list 00177 pTemp = p->pEntriesFree; 00178 for ( i = 1; i < p->nChunkSize; i++ ) 00179 { 00180 *((char **)pTemp) = pTemp + p->nEntrySize; 00181 pTemp += p->nEntrySize; 00182 } 00183 // set the last link 00184 *((char **)pTemp) = NULL; 00185 // add the chunk to the chunk storage 00186 p->pChunks[ p->nChunks++ ] = p->pEntriesFree; 00187 // add to the number of entries allocated 00188 p->nEntriesAlloc += p->nChunkSize; 00189 } 00190 // incrememt the counter of used entries 00191 p->nEntriesUsed++; 00192 if ( p->nEntriesMax < p->nEntriesUsed ) 00193 p->nEntriesMax = p->nEntriesUsed; 00194 // return the first entry in the free entry list 00195 pTemp = p->pEntriesFree; 00196 p->pEntriesFree = *((char **)pTemp); 00197 return pTemp; 00198 }
| void Aig_MmFixedEntryRecycle | ( | Aig_MmFixed_t * | p, | |
| char * | pEntry | |||
| ) |
Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
Definition at line 211 of file aigMem.c.
00212 { 00213 // decrement the counter of used entries 00214 p->nEntriesUsed--; 00215 // add the entry to the linked list of free entries 00216 *((char **)pEntry) = p->pEntriesFree; 00217 p->pEntriesFree = pEntry; 00218 }
| int Aig_MmFixedReadMaxEntriesUsed | ( | Aig_MmFixed_t * | p | ) |
Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
Definition at line 286 of file aigMem.c.
00287 { 00288 return p->nEntriesMax; 00289 }
| int Aig_MmFixedReadMemUsage | ( | Aig_MmFixed_t * | p | ) |
Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
Definition at line 270 of file aigMem.c.
00271 { 00272 return p->nMemoryAlloc; 00273 }
| void Aig_MmFixedRestart | ( | Aig_MmFixed_t * | p | ) |
Function*************************************************************
Synopsis []
Description [Relocates all the memory except the first chunk.]
SideEffects []
SeeAlso []
Definition at line 231 of file aigMem.c.
00232 { 00233 int i; 00234 char * pTemp; 00235 if ( p->nChunks == 0 ) 00236 return; 00237 // deallocate all chunks except the first one 00238 for ( i = 1; i < p->nChunks; i++ ) 00239 free( p->pChunks[i] ); 00240 p->nChunks = 1; 00241 // transform these entries into a linked list 00242 pTemp = p->pChunks[0]; 00243 for ( i = 1; i < p->nChunkSize; i++ ) 00244 { 00245 *((char **)pTemp) = pTemp + p->nEntrySize; 00246 pTemp += p->nEntrySize; 00247 } 00248 // set the last link 00249 *((char **)pTemp) = NULL; 00250 // set the free entry list 00251 p->pEntriesFree = p->pChunks[0]; 00252 // set the correct statistics 00253 p->nMemoryAlloc = p->nEntrySize * p->nChunkSize; 00254 p->nMemoryUsed = 0; 00255 p->nEntriesAlloc = p->nChunkSize; 00256 p->nEntriesUsed = 0; 00257 }
| Aig_MmFixed_t* Aig_MmFixedStart | ( | int | nEntrySize, | |
| int | nEntriesMax | |||
| ) |
FUNCTION DEFINITIONS ///Function*************************************************************
Synopsis [Allocates memory pieces of fixed size.]
Description [The size of the chunk is computed as the minimum of 1024 entries and 64K. Can only work with entry size at least 4 byte long.]
SideEffects []
SeeAlso []
Definition at line 95 of file aigMem.c.
00096 { 00097 Aig_MmFixed_t * p; 00098 00099 p = ALLOC( Aig_MmFixed_t, 1 ); 00100 memset( p, 0, sizeof(Aig_MmFixed_t) ); 00101 00102 p->nEntrySize = nEntrySize; 00103 p->nEntriesAlloc = 0; 00104 p->nEntriesUsed = 0; 00105 p->pEntriesFree = NULL; 00106 00107 p->nChunkSize = nEntriesMax / 8; 00108 if ( p->nChunkSize < 8 ) 00109 p->nChunkSize = 8; 00110 00111 p->nChunksAlloc = 64; 00112 p->nChunks = 0; 00113 p->pChunks = ALLOC( char *, p->nChunksAlloc ); 00114 00115 p->nMemoryUsed = 0; 00116 p->nMemoryAlloc = 0; 00117 return p; 00118 }
| void Aig_MmFixedStop | ( | Aig_MmFixed_t * | p, | |
| int | fVerbose | |||
| ) |
Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
Definition at line 131 of file aigMem.c.
00132 { 00133 int i; 00134 if ( p == NULL ) 00135 return; 00136 if ( fVerbose ) 00137 { 00138 printf( "Fixed memory manager: Entry = %5d. Chunk = %5d. Chunks used = %5d.\n", 00139 p->nEntrySize, p->nChunkSize, p->nChunks ); 00140 printf( " Entries used = %8d. Entries peak = %8d. Memory used = %8d. Memory alloc = %8d.\n", 00141 p->nEntriesUsed, p->nEntriesMax, p->nEntrySize * p->nEntriesUsed, p->nMemoryAlloc ); 00142 } 00143 for ( i = 0; i < p->nChunks; i++ ) 00144 free( p->pChunks[i] ); 00145 free( p->pChunks ); 00146 free( p ); 00147 }
| char* Aig_MmFlexEntryFetch | ( | Aig_MmFlex_t * | p, | |
| int | nBytes | |||
| ) |
Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
Definition at line 365 of file aigMem.c.
00366 { 00367 char * pTemp; 00368 // check if there are still free entries 00369 if ( p->pCurrent == NULL || p->pCurrent + nBytes > p->pEnd ) 00370 { // need to allocate more entries 00371 if ( p->nChunks == p->nChunksAlloc ) 00372 { 00373 p->nChunksAlloc *= 2; 00374 p->pChunks = REALLOC( char *, p->pChunks, p->nChunksAlloc ); 00375 } 00376 if ( nBytes > p->nChunkSize ) 00377 { 00378 // resize the chunk size if more memory is requested than it can give 00379 // (ideally, this should never happen) 00380 p->nChunkSize = 2 * nBytes; 00381 } 00382 p->pCurrent = ALLOC( char, p->nChunkSize ); 00383 p->pEnd = p->pCurrent + p->nChunkSize; 00384 p->nMemoryAlloc += p->nChunkSize; 00385 // add the chunk to the chunk storage 00386 p->pChunks[ p->nChunks++ ] = p->pCurrent; 00387 } 00388 assert( p->pCurrent + nBytes <= p->pEnd ); 00389 // increment the counter of used entries 00390 p->nEntriesUsed++; 00391 // keep track of the memory used 00392 p->nMemoryUsed += nBytes; 00393 // return the next entry 00394 pTemp = p->pCurrent; 00395 p->pCurrent += nBytes; 00396 return pTemp; 00397 }
| int Aig_MmFlexReadMemUsage | ( | Aig_MmFlex_t * | p | ) |
Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
Definition at line 438 of file aigMem.c.
00439 { 00440 return p->nMemoryUsed; 00441 }
| void Aig_MmFlexRestart | ( | Aig_MmFlex_t * | p | ) |
Function*************************************************************
Synopsis []
Description [Relocates all the memory except the first chunk.]
SideEffects []
SeeAlso []
Definition at line 410 of file aigMem.c.
00411 { 00412 int i; 00413 if ( p->nChunks == 0 ) 00414 return; 00415 // deallocate all chunks except the first one 00416 for ( i = 1; i < p->nChunks; i++ ) 00417 free( p->pChunks[i] ); 00418 p->nChunks = 1; 00419 p->nMemoryAlloc = p->nChunkSize; 00420 // transform these entries into a linked list 00421 p->pCurrent = p->pChunks[0]; 00422 p->pEnd = p->pCurrent + p->nChunkSize; 00423 p->nEntriesUsed = 0; 00424 p->nMemoryUsed = 0; 00425 }
| Aig_MmFlex_t* Aig_MmFlexStart | ( | ) |
Function*************************************************************
Synopsis [Allocates entries of flexible size.]
Description [Can only work with entry size at least 4 byte long.]
SideEffects []
SeeAlso []
Definition at line 304 of file aigMem.c.
00305 { 00306 Aig_MmFlex_t * p; 00307 00308 p = ALLOC( Aig_MmFlex_t, 1 ); 00309 memset( p, 0, sizeof(Aig_MmFlex_t) ); 00310 00311 p->nEntriesUsed = 0; 00312 p->pCurrent = NULL; 00313 p->pEnd = NULL; 00314 00315 p->nChunkSize = (1 << 18); 00316 p->nChunksAlloc = 64; 00317 p->nChunks = 0; 00318 p->pChunks = ALLOC( char *, p->nChunksAlloc ); 00319 00320 p->nMemoryUsed = 0; 00321 p->nMemoryAlloc = 0; 00322 return p; 00323 }
| void Aig_MmFlexStop | ( | Aig_MmFlex_t * | p, | |
| int | fVerbose | |||
| ) |
Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
Definition at line 336 of file aigMem.c.
00337 { 00338 int i; 00339 if ( p == NULL ) 00340 return; 00341 if ( fVerbose ) 00342 { 00343 printf( "Flexible memory manager: Chunk size = %d. Chunks used = %d.\n", 00344 p->nChunkSize, p->nChunks ); 00345 printf( " Entries used = %d. Memory used = %d. Memory alloc = %d.\n", 00346 p->nEntriesUsed, p->nMemoryUsed, p->nMemoryAlloc ); 00347 } 00348 for ( i = 0; i < p->nChunks; i++ ) 00349 free( p->pChunks[i] ); 00350 free( p->pChunks ); 00351 free( p ); 00352 }
| char* Aig_MmStepEntryFetch | ( | Aig_MmStep_t * | p, | |
| int | nBytes | |||
| ) |
Function*************************************************************
Synopsis [Creates the entry.]
Description []
SideEffects []
SeeAlso []
Definition at line 530 of file aigMem.c.
00531 { 00532 if ( nBytes == 0 ) 00533 return NULL; 00534 if ( nBytes > p->nMapSize ) 00535 { 00536 // printf( "Allocating %d bytes.\n", nBytes ); 00537 /* 00538 if ( p->nLargeChunks == p->nLargeChunksAlloc ) 00539 { 00540 if ( p->nLargeChunksAlloc == 0 ) 00541 p->nLargeChunksAlloc = 5; 00542 p->nLargeChunksAlloc *= 2; 00543 p->pLargeChunks = REALLOC( char *, p->pLargeChunks, p->nLargeChunksAlloc ); 00544 } 00545 p->pLargeChunks[ p->nLargeChunks++ ] = ALLOC( char, nBytes ); 00546 return p->pLargeChunks[ p->nLargeChunks - 1 ]; 00547 */ 00548 return ALLOC( char, nBytes ); 00549 } 00550 return Aig_MmFixedEntryFetch( p->pMap[nBytes] ); 00551 }
| void Aig_MmStepEntryRecycle | ( | Aig_MmStep_t * | p, | |
| char * | pEntry, | |||
| int | nBytes | |||
| ) |
Function*************************************************************
Synopsis [Recycles the entry.]
Description []
SideEffects []
SeeAlso []
Definition at line 565 of file aigMem.c.
00566 { 00567 if ( nBytes == 0 ) 00568 return; 00569 if ( nBytes > p->nMapSize ) 00570 { 00571 free( pEntry ); 00572 return; 00573 } 00574 Aig_MmFixedEntryRecycle( p->pMap[nBytes], pEntry ); 00575 }
| int Aig_MmStepReadMemUsage | ( | Aig_MmStep_t * | p | ) |
Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
Definition at line 588 of file aigMem.c.
00589 { 00590 int i, nMemTotal = 0; 00591 for ( i = 0; i < p->nMems; i++ ) 00592 nMemTotal += p->pMems[i]->nMemoryAlloc; 00593 return nMemTotal; 00594 }
| Aig_MmStep_t* Aig_MmStepStart | ( | int | nSteps | ) |
Function*************************************************************
Synopsis [Starts the hierarchical memory manager.]
Description [This manager can allocate entries of any size. Iternally they are mapped into the entries with the number of bytes equal to the power of 2. The smallest entry size is 8 bytes. The next one is 16 bytes etc. So, if the user requests 6 bytes, he gets 8 byte entry. If we asks for 25 bytes, he gets 32 byte entry etc. The input parameters "nSteps" says how many fixed memory managers are employed internally. Calling this procedure with nSteps equal to 10 results in 10 hierarchically arranged internal memory managers, which can allocate up to 4096 (1Kb) entries. Requests for larger entries are handed over to malloc() and then free()ed.]
SideEffects []
SeeAlso []
Definition at line 467 of file aigMem.c.
00468 { 00469 Aig_MmStep_t * p; 00470 int i, k; 00471 p = ALLOC( Aig_MmStep_t, 1 ); 00472 memset( p, 0, sizeof(Aig_MmStep_t) ); 00473 p->nMems = nSteps; 00474 // start the fixed memory managers 00475 p->pMems = ALLOC( Aig_MmFixed_t *, p->nMems ); 00476 for ( i = 0; i < p->nMems; i++ ) 00477 p->pMems[i] = Aig_MmFixedStart( (8<<i), (1<<13) ); 00478 // set up the mapping of the required memory size into the corresponding manager 00479 p->nMapSize = (4<<p->nMems); 00480 p->pMap = ALLOC( Aig_MmFixed_t *, p->nMapSize+1 ); 00481 p->pMap[0] = NULL; 00482 for ( k = 1; k <= 4; k++ ) 00483 p->pMap[k] = p->pMems[0]; 00484 for ( i = 0; i < p->nMems; i++ ) 00485 for ( k = (4<<i)+1; k <= (8<<i); k++ ) 00486 p->pMap[k] = p->pMems[i]; 00487 //for ( i = 1; i < 100; i ++ ) 00488 //printf( "%10d: size = %10d\n", i, p->pMap[i]->nEntrySize ); 00489 return p; 00490 }
| void Aig_MmStepStop | ( | Aig_MmStep_t * | p, | |
| int | fVerbose | |||
| ) |
Function*************************************************************
Synopsis [Stops the memory manager.]
Description []
SideEffects []
SeeAlso []
Definition at line 503 of file aigMem.c.
00504 { 00505 int i; 00506 for ( i = 0; i < p->nMems; i++ ) 00507 Aig_MmFixedStop( p->pMems[i], fVerbose ); 00508 // if ( p->pLargeChunks ) 00509 // { 00510 // for ( i = 0; i < p->nLargeChunks; i++ ) 00511 // free( p->pLargeChunks[i] ); 00512 // free( p->pLargeChunks ); 00513 // } 00514 free( p->pMems ); 00515 free( p->pMap ); 00516 free( p ); 00517 }
Function*************************************************************
Synopsis [Implements ITE operation.]
Description []
SideEffects []
SeeAlso []
Definition at line 323 of file aigOper.c.
00324 { 00325 /* 00326 Aig_Obj_t * pTempA1, * pTempA2, * pTempB1, * pTempB2, * pTemp; 00327 int Count0, Count1; 00328 // consider trivial cases 00329 if ( p0 == Aig_Not(p1) ) 00330 return Aig_Exor( p, pC, p0 ); 00331 // other cases can be added 00332 // implement the first MUX (F = C * x1 + C' * x0) 00333 00334 // check for constants here!!! 00335 00336 pTempA1 = Aig_TableLookup( p, Aig_ObjCreateGhost(p, pC, p1, AIG_OBJ_AND) ); 00337 pTempA2 = Aig_TableLookup( p, Aig_ObjCreateGhost(p, Aig_Not(pC), p0, AIG_OBJ_AND) ); 00338 if ( pTempA1 && pTempA2 ) 00339 { 00340 pTemp = Aig_TableLookup( p, Aig_ObjCreateGhost(p, Aig_Not(pTempA1), Aig_Not(pTempA2), AIG_OBJ_AND) ); 00341 if ( pTemp ) return Aig_Not(pTemp); 00342 } 00343 Count0 = (pTempA1 != NULL) + (pTempA2 != NULL); 00344 // implement the second MUX (F' = C * x1' + C' * x0') 00345 pTempB1 = Aig_TableLookup( p, Aig_ObjCreateGhost(p, pC, Aig_Not(p1), AIG_OBJ_AND) ); 00346 pTempB2 = Aig_TableLookup( p, Aig_ObjCreateGhost(p, Aig_Not(pC), Aig_Not(p0), AIG_OBJ_AND) ); 00347 if ( pTempB1 && pTempB2 ) 00348 { 00349 pTemp = Aig_TableLookup( p, Aig_ObjCreateGhost(p, Aig_Not(pTempB1), Aig_Not(pTempB2), AIG_OBJ_AND) ); 00350 if ( pTemp ) return pTemp; 00351 } 00352 Count1 = (pTempB1 != NULL) + (pTempB2 != NULL); 00353 // compare and decide which one to implement 00354 if ( Count0 >= Count1 ) 00355 { 00356 pTempA1 = pTempA1? pTempA1 : Aig_And(p, pC, p1); 00357 pTempA2 = pTempA2? pTempA2 : Aig_And(p, Aig_Not(pC), p0); 00358 return Aig_Or( p, pTempA1, pTempA2 ); 00359 } 00360 pTempB1 = pTempB1? pTempB1 : Aig_And(p, pC, Aig_Not(p1)); 00361 pTempB2 = pTempB2? pTempB2 : Aig_And(p, Aig_Not(pC), Aig_Not(p0)); 00362 return Aig_Not( Aig_Or( p, pTempB1, pTempB2 ) ); 00363 */ 00364 return Aig_Or( p, Aig_And(p, pC, p1), Aig_And(p, Aig_Not(pC), p0) ); 00365 }
| int Aig_NodeDeref_rec | ( | Aig_Obj_t * | pNode, | |
| unsigned | LevelMin | |||
| ) |
CFile****************************************************************
FileName [aigMffc.c]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [AIG package.]
Synopsis [Computation of MFFCs.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - April 28, 2007.]
Revision [
- Id
- aigMffc.c,v 1.00 2007/04/28 00:00:00 alanmi Exp
] DECLARATIONS /// FUNCTION DEFINITIONS ///Function*************************************************************
Synopsis [Dereferences the node's MFFC.]
Description []
SideEffects []
SeeAlso []
Definition at line 42 of file aigMffc.c.
00043 { 00044 Aig_Obj_t * pFanin; 00045 int Counter = 0; 00046 if ( Aig_ObjIsPi(pNode) ) 00047 return 0; 00048 // consider the first fanin 00049 pFanin = Aig_ObjFanin0(pNode); 00050 assert( pFanin->nRefs > 0 ); 00051 if ( --pFanin->nRefs == 0 && (!LevelMin || pFanin->Level > LevelMin) ) 00052 Counter += Aig_NodeDeref_rec( pFanin, LevelMin ); 00053 // skip the buffer 00054 if ( Aig_ObjIsBuf(pNode) ) 00055 return Counter; 00056 assert( Aig_ObjIsNode(pNode) ); 00057 // consider the second fanin 00058 pFanin = Aig_ObjFanin1(pNode); 00059 assert( pFanin->nRefs > 0 ); 00060 if ( --pFanin->nRefs == 0 && (!LevelMin || pFanin->Level > LevelMin) ) 00061 Counter += Aig_NodeDeref_rec( pFanin, LevelMin ); 00062 return Counter + 1; 00063 }
| int Aig_NodeMffsExtendCut | ( | Aig_Man_t * | p, | |
| Aig_Obj_t * | pNode, | |||
| Vec_Ptr_t * | vLeaves, | |||
| Vec_Ptr_t * | vResult | |||
| ) |
Function*************************************************************
Synopsis [Expands the cut by adding the most closely related node.]
Description [Returns 1 if the cut exists.]
SideEffects []
SeeAlso []
Definition at line 248 of file aigMffc.c.
00249 { 00250 Aig_Obj_t * pObj, * pLeafBest; 00251 int i, LevelMax, ConeSize1, ConeSize2, ConeCur1, ConeCur2, ConeBest; 00252 // dereference the current cut 00253 LevelMax = 0; 00254 Vec_PtrForEachEntry( vLeaves, pObj, i ) 00255 LevelMax = AIG_MAX( LevelMax, (int)pObj->Level ); 00256 if ( LevelMax == 0 ) 00257 return 0; 00258 // dereference the cut 00259 ConeSize1 = Aig_NodeDeref_rec( pNode, 0 ); 00260 // try expanding each node in the boundary 00261 ConeBest = AIG_INFINITY; 00262 pLeafBest = NULL; 00263 Vec_PtrForEachEntry( vLeaves, pObj, i ) 00264 { 00265 if ( (int)pObj->Level != LevelMax ) 00266 continue; 00267 ConeCur1 = Aig_NodeDeref_rec( pObj, 0 ); 00268 if ( ConeBest > ConeCur1 ) 00269 { 00270 ConeBest = ConeCur1; 00271 pLeafBest = pObj; 00272 } 00273 ConeCur2 = Aig_NodeRef_rec( pObj, 0 ); 00274 assert( ConeCur1 == ConeCur2 ); 00275 } 00276 assert( pLeafBest != NULL ); 00277 assert( Aig_ObjIsNode(pLeafBest) ); 00278 // deref the best leaf 00279 ConeCur1 = Aig_NodeDeref_rec( pLeafBest, 0 ); 00280 // collect the cut nodes 00281 Vec_PtrClear( vResult ); 00282 Aig_ManIncrementTravId( p ); 00283 Aig_NodeMffsSupp_rec( p, pNode, 0, vResult, 1, pLeafBest ); 00284 // ref the nodes 00285 ConeCur2 = Aig_NodeRef_rec( pLeafBest, 0 ); 00286 assert( ConeCur1 == ConeCur2 ); 00287 // ref the original node 00288 ConeSize2 = Aig_NodeRef_rec( pNode, 0 ); 00289 assert( ConeSize1 == ConeSize2 ); 00290 return 1; 00291 }
Function*************************************************************
Synopsis [Labels the nodes in the MFFC.]
Description [Returns the number of internal nodes in the MFFC.]
SideEffects []
SeeAlso []
Definition at line 195 of file aigMffc.c.
00196 { 00197 int ConeSize1, ConeSize2; 00198 assert( !Aig_IsComplement(pNode) ); 00199 assert( Aig_ObjIsNode(pNode) ); 00200 Aig_ManIncrementTravId( p ); 00201 ConeSize1 = Aig_NodeDeref_rec( pNode, 0 ); 00202 ConeSize2 = Aig_NodeRefLabel_rec( p, pNode, 0 ); 00203 assert( ConeSize1 == ConeSize2 ); 00204 assert( ConeSize1 > 0 ); 00205 return ConeSize1; 00206 }
Function*************************************************************
Synopsis [Labels the nodes in the MFFC.]
Description [Returns the number of internal nodes in the MFFC.]
SideEffects []
SeeAlso []
Definition at line 219 of file aigMffc.c.
00220 { 00221 Aig_Obj_t * pObj; 00222 int i, ConeSize1, ConeSize2; 00223 assert( !Aig_IsComplement(pNode) ); 00224 assert( Aig_ObjIsNode(pNode) ); 00225 Aig_ManIncrementTravId( p ); 00226 Vec_PtrForEachEntry( vLeaves, pObj, i ) 00227 pObj->nRefs++; 00228 ConeSize1 = Aig_NodeDeref_rec( pNode, 0 ); 00229 ConeSize2 = Aig_NodeRefLabel_rec( p, pNode, 0 ); 00230 Vec_PtrForEachEntry( vLeaves, pObj, i ) 00231 pObj->nRefs--; 00232 assert( ConeSize1 == ConeSize2 ); 00233 assert( ConeSize1 > 0 ); 00234 return ConeSize1; 00235 }
Function*************************************************************
Synopsis [Collects the support of depth-limited MFFC.]
Description [Returns the number of internal nodes in the MFFC.]
SideEffects []
SeeAlso []
Definition at line 169 of file aigMffc.c.
00170 { 00171 int ConeSize1, ConeSize2; 00172 assert( !Aig_IsComplement(pNode) ); 00173 assert( Aig_ObjIsNode(pNode) ); 00174 if ( vSupp ) Vec_PtrClear( vSupp ); 00175 Aig_ManIncrementTravId( p ); 00176 ConeSize1 = Aig_NodeDeref_rec( pNode, LevelMin ); 00177 Aig_NodeMffsSupp_rec( p, pNode, LevelMin, vSupp, 1, NULL ); 00178 ConeSize2 = Aig_NodeRef_rec( pNode, LevelMin ); 00179 assert( ConeSize1 == ConeSize2 ); 00180 assert( ConeSize1 > 0 ); 00181 return ConeSize1; 00182 }
| int Aig_NodeRef_rec | ( | Aig_Obj_t * | pNode, | |
| unsigned | LevelMin | |||
| ) |
Function*************************************************************
Synopsis [References the node's MFFC.]
Description []
SideEffects []
SeeAlso []
Definition at line 76 of file aigMffc.c.
00077 { 00078 Aig_Obj_t * pFanin; 00079 int Counter = 0; 00080 if ( Aig_ObjIsPi(pNode) ) 00081 return 0; 00082 // consider the first fanin 00083 pFanin = Aig_ObjFanin0(pNode); 00084 if ( pFanin->nRefs++ == 0 && (!LevelMin || pFanin->Level > LevelMin) ) 00085 Counter += Aig_NodeRef_rec( pFanin, LevelMin ); 00086 // skip the buffer 00087 if ( Aig_ObjIsBuf(pNode) ) 00088 return Counter; 00089 assert( Aig_ObjIsNode(pNode) ); 00090 // consider the second fanin 00091 pFanin = Aig_ObjFanin1(pNode); 00092 if ( pFanin->nRefs++ == 0 && (!LevelMin || pFanin->Level > LevelMin) ) 00093 Counter += Aig_NodeRef_rec( pFanin, LevelMin ); 00094 return Counter + 1; 00095 }
Function*************************************************************
Synopsis [Adds fanout (pFanout) of node (pObj).]
Description []
SideEffects []
SeeAlso []
Definition at line 104 of file aigFanout.c.
00105 { 00106 int iFan, * pFirst, * pPrevC, * pNextC, * pPrev, * pNext; 00107 assert( p->pFanData ); 00108 assert( !Aig_IsComplement(pObj) && !Aig_IsComplement(pFanout) ); 00109 assert( pFanout->Id > 0 ); 00110 if ( pObj->Id >= p->nFansAlloc || pFanout->Id >= p->nFansAlloc ) 00111 { 00112 int nFansAlloc = 2 * AIG_MAX( pObj->Id, pFanout->Id ); 00113 p->pFanData = REALLOC( int, p->pFanData, 5 * nFansAlloc ); 00114 memset( p->pFanData + 5 * p->nFansAlloc, 0, sizeof(int) * 5 * (nFansAlloc - p->nFansAlloc) ); 00115 p->nFansAlloc = nFansAlloc; 00116 } 00117 assert( pObj->Id < p->nFansAlloc && pFanout->Id < p->nFansAlloc ); 00118 iFan = Aig_FanoutCreate( pFanout->Id, Aig_ObjWhatFanin(pFanout, pObj) ); 00119 pPrevC = Aig_FanoutPrev( p->pFanData, iFan ); 00120 pNextC = Aig_FanoutNext( p->pFanData, iFan ); 00121 pFirst = Aig_FanoutObj( p->pFanData, pObj->Id ); 00122 if ( *pFirst == 0 ) 00123 { 00124 *pFirst = iFan; 00125 *pPrevC = iFan; 00126 *pNextC = iFan; 00127 } 00128 else 00129 { 00130 pPrev = Aig_FanoutPrev( p->pFanData, *pFirst ); 00131 pNext = Aig_FanoutNext( p->pFanData, *pPrev ); 00132 assert( *pNext == *pFirst ); 00133 *pPrevC = *pPrev; 00134 *pNextC = *pFirst; 00135 *pPrev = iFan; 00136 *pNext = iFan; 00137 } 00138 }
Definition at line 243 of file aig.h.
00243 { assert( !Aig_IsComplement(pObj) ); return Aig_ObjFanin0(pObj)? Aig_NotCond((Aig_Obj_t *)Aig_ObjFanin0(pObj)->pData, Aig_ObjFaninC0(pObj)) : NULL; }
Definition at line 244 of file aig.h.
00244 { assert( !Aig_IsComplement(pObj) ); return Aig_ObjFanin1(pObj)? Aig_NotCond((Aig_Obj_t *)Aig_ObjFanin1(pObj)->pData, Aig_ObjFaninC1(pObj)) : NULL; }
| static void Aig_ObjClean | ( | Aig_Obj_t * | pObj | ) | [inline, static] |
| void Aig_ObjCleanData_rec | ( | Aig_Obj_t * | pObj | ) |
Function*************************************************************
Synopsis [Recursively cleans the data pointers in the cone of the node.]
Description [Applicable to small AIGs only because no caching is performed.]
SideEffects []
SeeAlso []
Definition at line 199 of file aigUtil.c.
00200 { 00201 assert( !Aig_IsComplement(pObj) ); 00202 assert( !Aig_ObjIsPo(pObj) ); 00203 if ( Aig_ObjIsAnd(pObj) ) 00204 { 00205 Aig_ObjCleanData_rec( Aig_ObjFanin0(pObj) ); 00206 Aig_ObjCleanData_rec( Aig_ObjFanin1(pObj) ); 00207 } 00208 pObj->pData = NULL; 00209 }
| static void Aig_ObjClearMarkA | ( | Aig_Obj_t * | pObj | ) | [inline, static] |
| static void Aig_ObjClearRef | ( | Aig_Obj_t * | pObj | ) | [inline, static] |
Function*************************************************************
Synopsis [Resets reverse level of the node.]
Description []
SideEffects []
SeeAlso []
Definition at line 80 of file aigTiming.c.
00081 { 00082 Aig_ObjSetReverseLevel( p, pObj, 0 ); 00083 }
Function*************************************************************
Synopsis [Computes the internal nodes of the cut.]
Description [Does not include the leaves of the cut.]
SideEffects []
SeeAlso []
Definition at line 597 of file aigDfs.c.
00598 { 00599 Aig_Obj_t * pObj; 00600 int i; 00601 // collect and mark the leaves 00602 Vec_PtrClear( vNodes ); 00603 Vec_PtrForEachEntry( vLeaves, pObj, i ) 00604 { 00605 assert( pObj->fMarkA == 0 ); 00606 pObj->fMarkA = 1; 00607 // printf( "%d " , pObj->Id ); 00608 } 00609 //printf( "\n" ); 00610 // collect and mark the nodes 00611 Aig_ObjCollectCut_rec( pRoot, vNodes ); 00612 // clean the nodes 00613 Vec_PtrForEachEntry( vNodes, pObj, i ) 00614 pObj->fMarkA = 0; 00615 Vec_PtrForEachEntry( vLeaves, pObj, i ) 00616 pObj->fMarkA = 0; 00617 }
Function*************************************************************
Synopsis [Detects multi-input gate rooted at this node.]
Description []
SideEffects []
SeeAlso []
Definition at line 245 of file aigUtil.c.
00246 { 00247 assert( !Aig_IsComplement(pRoot) ); 00248 Vec_PtrClear( vSuper ); 00249 Aig_ObjCollectMulti_rec( pRoot, pRoot, vSuper ); 00250 }
Function*************************************************************
Synopsis [Collects the nodes of the supergate.]
Description []
SideEffects []
SeeAlso []
Definition at line 677 of file aigDfs.c.
00678 { 00679 int RetValue, i; 00680 assert( !Aig_IsComplement(pObj) ); 00681 assert( Aig_ObjIsNode(pObj) ); 00682 // collect the nodes in the implication supergate 00683 Vec_PtrClear( vSuper ); 00684 RetValue = Aig_ObjCollectSuper_rec( pObj, pObj, vSuper ); 00685 assert( Vec_PtrSize(vSuper) > 1 ); 00686 // unmark the visited nodes 00687 Vec_PtrForEachEntry( vSuper, pObj, i ) 00688 Aig_Regular(pObj)->fMarkA = 0; 00689 // if we found the node and its complement in the same implication supergate, 00690 // return empty set of nodes (meaning that we should use constant-0 node) 00691 if ( RetValue == -1 ) 00692 vSuper->nSize = 0; 00693 return RetValue; 00694 }
Function*************************************************************
Synopsis [Connect the object to the fanin.]
Description []
SideEffects []
SeeAlso []
Definition at line 114 of file aigObj.c.
00115 { 00116 assert( !Aig_IsComplement(pObj) ); 00117 assert( !Aig_ObjIsPi(pObj) ); 00118 // add the first fanin 00119 pObj->pFanin0 = pFan0; 00120 pObj->pFanin1 = pFan1; 00121 // increment references of the fanins and add their fanouts 00122 if ( pFan0 != NULL ) 00123 { 00124 assert( Aig_ObjFanin0(pObj)->Type > 0 ); 00125 Aig_ObjRef( Aig_ObjFanin0(pObj) ); 00126 if ( p->pFanData ) 00127 Aig_ObjAddFanout( p, Aig_ObjFanin0(pObj), pObj ); 00128 } 00129 if ( pFan1 != NULL ) 00130 { 00131 assert( Aig_ObjFanin1(pObj)->Type > 0 ); 00132 Aig_ObjRef( Aig_ObjFanin1(pObj) ); 00133 if ( p->pFanData ) 00134 Aig_ObjAddFanout( p, Aig_ObjFanin1(pObj), pObj ); 00135 } 00136 // set level and phase 00137 pObj->Level = Aig_ObjLevelNew( pObj ); 00138 pObj->fPhase = Aig_ObjPhaseReal(pFan0) & Aig_ObjPhaseReal(pFan1); 00139 // add the node to the structural hash table 00140 if ( Aig_ObjIsHash(pObj) ) 00141 Aig_TableInsert( p, pObj ); 00142 // add the node to the dynamically updated topological order 00143 // if ( p->pOrderData && Aig_ObjIsNode(pObj) ) 00144 // Aig_ObjOrderInsert( p, pObj->Id ); 00145 }
Function*************************************************************
Synopsis [Create the new node assuming it does not exist.]
Description []
SideEffects []
SeeAlso []
Definition at line 86 of file aigObj.c.
00087 { 00088 Aig_Obj_t * pObj; 00089 assert( !Aig_IsComplement(pGhost) ); 00090 assert( Aig_ObjIsHash(pGhost) ); 00091 assert( pGhost == &p->Ghost ); 00092 // get memory for the new object 00093 pObj = Aig_ManFetchMemory( p ); 00094 pObj->Type = pGhost->Type; 00095 // add connections 00096 Aig_ObjConnect( p, pObj, pGhost->pFanin0, pGhost->pFanin1 ); 00097 // update node counters of the manager 00098 p->nObjs[Aig_ObjType(pObj)]++; 00099 assert( pObj->pData == NULL ); 00100 return pObj; 00101 }
| static Aig_Obj_t* Aig_ObjCreateGhost | ( | Aig_Man_t * | p, | |
| Aig_Obj_t * | p0, | |||
| Aig_Obj_t * | p1, | |||
| Aig_Type_t | Type | |||
| ) | [inline, static] |
Definition at line 264 of file aig.h.
00265 { 00266 Aig_Obj_t * pGhost; 00267 assert( Type != AIG_OBJ_AND || !Aig_ObjIsConst1(Aig_Regular(p0)) ); 00268 assert( p1 == NULL || !Aig_ObjIsConst1(Aig_Regular(p1)) ); 00269 assert( Type == AIG_OBJ_PI || Aig_Regular(p0) != Aig_Regular(p1) ); 00270 pGhost = Aig_ManGhost(p); 00271 pGhost->Type = Type; 00272 if ( p1 == NULL || Aig_Regular(p0)->Id < Aig_Regular(p1)->Id ) 00273 { 00274 pGhost->pFanin0 = p0; 00275 pGhost->pFanin1 = p1; 00276 } 00277 else 00278 { 00279 pGhost->pFanin0 = p1; 00280 pGhost->pFanin1 = p0; 00281 } 00282 return pGhost; 00283 }
CFile****************************************************************
FileName [aigObj.c]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [AIG package.]
Synopsis [Adding/removing objects.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - April 28, 2007.]
Revision [
- Id
- aigObj.c,v 1.00 2007/04/28 00:00:00 alanmi Exp
] DECLARATIONS /// FUNCTION DEFINITIONS ///Function*************************************************************
Synopsis [Creates primary input.]
Description []
SideEffects []
SeeAlso []
Definition at line 42 of file aigObj.c.
00043 { 00044 Aig_Obj_t * pObj; 00045 pObj = Aig_ManFetchMemory( p ); 00046 pObj->Type = AIG_OBJ_PI; 00047 Vec_PtrPush( p->vPis, pObj ); 00048 p->nObjs[AIG_OBJ_PI]++; 00049 return pObj; 00050 }
Function*************************************************************
Synopsis [Creates primary output with the given driver.]
Description []
SideEffects []
SeeAlso []
Definition at line 63 of file aigObj.c.
00064 { 00065 Aig_Obj_t * pObj; 00066 pObj = Aig_ManFetchMemory( p ); 00067 pObj->Type = AIG_OBJ_PO; 00068 Vec_PtrPush( p->vPos, pObj ); 00069 Aig_ObjConnect( p, pObj, pDriver, NULL ); 00070 p->nObjs[AIG_OBJ_PO]++; 00071 return pObj; 00072 }
Function*************************************************************
Synopsis [Set the representative.]
Description []
SideEffects []
SeeAlso []
Definition at line 80 of file aigRepr.c.
00081 { 00082 assert( p->pReprs != NULL ); 00083 assert( !Aig_IsComplement(pNode1) ); 00084 assert( !Aig_IsComplement(pNode2) ); 00085 assert( pNode1->Id < p->nReprsAlloc ); 00086 assert( pNode2->Id < p->nReprsAlloc ); 00087 assert( pNode1->Id < pNode2->Id ); 00088 p->pReprs[pNode2->Id] = pNode1; 00089 }
| static unsigned Aig_ObjCutSign | ( | unsigned | ObjId | ) | [inline, static] |
Function*************************************************************
Synopsis [Deletes the node.]
Description []
SideEffects []
SeeAlso []
Definition at line 196 of file aigObj.c.
00197 { 00198 assert( !Aig_IsComplement(pObj) ); 00199 assert( !Aig_ObjIsTerm(pObj) ); 00200 assert( Aig_ObjRefs(pObj) == 0 ); 00201 if ( p->pFanData && Aig_ObjIsBuf(pObj) ) 00202 Vec_PtrRemove( p->vBufs, pObj ); 00203 p->nObjs[pObj->Type]--; 00204 Vec_PtrWriteEntry( p->vObjs, pObj->Id, NULL ); 00205 Aig_ManRecycleMemory( p, pObj ); 00206 }
Function*************************************************************
Synopsis [Deletes the MFFC of the node.]
Description []
SideEffects []
SeeAlso []
Definition at line 219 of file aigObj.c.
00220 { 00221 Aig_Obj_t * pFanin0, * pFanin1; 00222 assert( !Aig_IsComplement(pObj) ); 00223 if ( Aig_ObjIsConst1(pObj) || Aig_ObjIsPi(pObj) ) 00224 return; 00225 assert( !Aig_ObjIsPo(pObj) ); 00226 pFanin0 = Aig_ObjFanin0(pObj); 00227 pFanin1 = Aig_ObjFanin1(pObj); 00228 Aig_ObjDisconnect( p, pObj ); 00229 if ( fFreeTop ) 00230 Aig_ObjDelete( p, pObj ); 00231 if ( pFanin0 && !Aig_ObjIsNone(pFanin0) && Aig_ObjRefs(pFanin0) == 0 ) 00232 Aig_ObjDelete_rec( p, pFanin0, 1 ); 00233 if ( pFanin1 && !Aig_ObjIsNone(pFanin1) && Aig_ObjRefs(pFanin1) == 0 ) 00234 Aig_ObjDelete_rec( p, pFanin1, 1 ); 00235 }
| static void Aig_ObjDeref | ( | Aig_Obj_t * | pObj | ) | [inline, static] |
Function*************************************************************
Synopsis [Disconnects the object from the fanins.]
Description []
SideEffects []
SeeAlso []
Definition at line 158 of file aigObj.c.
00159 { 00160 assert( !Aig_IsComplement(pObj) ); 00161 // remove connections 00162 if ( pObj->pFanin0 != NULL ) 00163 { 00164 if ( p->pFanData ) 00165 Aig_ObjRemoveFanout( p, Aig_ObjFanin0(pObj), pObj ); 00166 Aig_ObjDeref(Aig_ObjFanin0(pObj)); 00167 } 00168 if ( pObj->pFanin1 != NULL ) 00169 { 00170 if ( p->pFanData ) 00171 Aig_ObjRemoveFanout( p, Aig_ObjFanin1(pObj), pObj ); 00172 Aig_ObjDeref(Aig_ObjFanin1(pObj)); 00173 } 00174 // remove the node from the structural hash table 00175 if ( Aig_ObjIsHash(pObj) ) 00176 Aig_TableDelete( p, pObj ); 00177 // add the first fanin 00178 pObj->pFanin0 = NULL; 00179 pObj->pFanin1 = NULL; 00180 // remove the node from the dynamically updated topological order 00181 // if ( p->pOrderData && Aig_ObjIsNode(pObj) ) 00182 // Aig_ObjOrderRemove( p, pObj->Id ); 00183 }
Definition at line 239 of file aig.h.
00239 { return Aig_Regular(pObj->pFanin0); }
Definition at line 240 of file aig.h.
00240 { return Aig_Regular(pObj->pFanin1); }
| static int Aig_ObjFaninC0 | ( | Aig_Obj_t * | pObj | ) | [inline, static] |
Definition at line 237 of file aig.h.
00237 { return Aig_IsComplement(pObj->pFanin0); }
| static int Aig_ObjFaninC1 | ( | Aig_Obj_t * | pObj | ) | [inline, static] |
Definition at line 238 of file aig.h.
00238 { return Aig_IsComplement(pObj->pFanin1); }
| static int Aig_ObjFaninId0 | ( | Aig_Obj_t * | pObj | ) | [inline, static] |
| static int Aig_ObjFaninId1 | ( | Aig_Obj_t * | pObj | ) | [inline, static] |
Definition at line 248 of file aig.h.
00248 { assert(p->pFanData && pObj->Id < p->nFansAlloc); return Aig_ManObj(p, p->pFanData[5*pObj->Id] >> 1); }
| static int Aig_ObjFanout0Int | ( | Aig_Man_t * | p, | |
| int | ObjId | |||
| ) | [inline, static] |
Definition at line 256 of file aig.h.
00257 { 00258 if ( Aig_ObjFanin0(pFanout) == pObj ) return Aig_ObjFaninC0(pObj); 00259 if ( Aig_ObjFanin1(pFanout) == pObj ) return Aig_ObjFaninC1(pObj); 00260 assert(0); return -1; 00261 }
| static int Aig_ObjFanoutNext | ( | Aig_Man_t * | p, | |
| int | iFan | |||
| ) | [inline, static] |
Definition at line 336 of file aig.h.
00336 { assert(iFan/2 < p->nFansAlloc); return p->pFanData[5*(iFan >> 1) + 3 + (iFan & 1)]; }
| static int Aig_ObjIsAnd | ( | Aig_Obj_t * | pObj | ) | [inline, static] |
Definition at line 211 of file aig.h.
00211 { return pObj->Type == AIG_OBJ_AND; }
| static int Aig_ObjIsBuf | ( | Aig_Obj_t * | pObj | ) | [inline, static] |
Definition at line 210 of file aig.h.
00210 { return pObj->Type == AIG_OBJ_BUF; }
| static int Aig_ObjIsConst1 | ( | Aig_Obj_t * | pObj | ) | [inline, static] |
Definition at line 207 of file aig.h.
00207 { assert(!Aig_IsComplement(pObj)); return pObj->Type == AIG_OBJ_CONST1; }
| static int Aig_ObjIsExor | ( | Aig_Obj_t * | pObj | ) | [inline, static] |
Definition at line 212 of file aig.h.
00212 { return pObj->Type == AIG_OBJ_EXOR; }
| static int Aig_ObjIsHash | ( | Aig_Obj_t * | pObj | ) | [inline, static] |
Definition at line 216 of file aig.h.
00216 { return pObj->Type == AIG_OBJ_AND || pObj->Type == AIG_OBJ_EXOR || pObj->Type == AIG_OBJ_LATCH; }
| static int Aig_ObjIsLatch | ( | Aig_Obj_t * | pObj | ) | [inline, static] |
Definition at line 213 of file aig.h.
00213 { return pObj->Type == AIG_OBJ_LATCH; }
| static int Aig_ObjIsMarkA | ( | Aig_Obj_t * | pObj | ) | [inline, static] |
| int Aig_ObjIsMuxType | ( | Aig_Obj_t * | pNode | ) |
Function*************************************************************
Synopsis [Returns 1 if the node is the root of MUX or EXOR/NEXOR.]
Description []
SideEffects []
SeeAlso []
Definition at line 263 of file aigUtil.c.
00264 { 00265 Aig_Obj_t * pNode0, * pNode1; 00266 // check that the node is regular 00267 assert( !Aig_IsComplement(pNode) ); 00268 // if the node is not AND, this is not MUX 00269 if ( !Aig_ObjIsAnd(pNode) ) 00270 return 0; 00271 // if the children are not complemented, this is not MUX 00272 if ( !Aig_ObjFaninC0(pNode) || !Aig_ObjFaninC1(pNode) ) 00273 return 0; 00274 // get children 00275 pNode0 = Aig_ObjFanin0(pNode); 00276 pNode1 = Aig_ObjFanin1(pNode); 00277 // if the children are not ANDs, this is not MUX 00278 if ( !Aig_ObjIsAnd(pNode0) || !Aig_ObjIsAnd(pNode1) ) 00279 return 0; 00280 // otherwise the node is MUX iff it has a pair of equal grandchildren 00281 return (Aig_ObjFanin0(pNode0) == Aig_ObjFanin0(pNode1) && (Aig_ObjFaninC0(pNode0) ^ Aig_ObjFaninC0(pNode1))) || 00282 (Aig_ObjFanin0(pNode0) == Aig_ObjFanin1(pNode1) && (Aig_ObjFaninC0(pNode0) ^ Aig_ObjFaninC1(pNode1))) || 00283 (Aig_ObjFanin1(pNode0) == Aig_ObjFanin0(pNode1) && (Aig_ObjFaninC1(pNode0) ^ Aig_ObjFaninC0(pNode1))) || 00284 (Aig_ObjFanin1(pNode0) == Aig_ObjFanin1(pNode1) && (Aig_ObjFaninC1(pNode0) ^ Aig_ObjFaninC1(pNode1))); 00285 }
| static int Aig_ObjIsNode | ( | Aig_Obj_t * | pObj | ) | [inline, static] |
Definition at line 214 of file aig.h.
00214 { return pObj->Type == AIG_OBJ_AND || pObj->Type == AIG_OBJ_EXOR; }
| static int Aig_ObjIsNone | ( | Aig_Obj_t * | pObj | ) | [inline, static] |
Definition at line 206 of file aig.h.
00206 { return pObj->Type == AIG_OBJ_NONE; }
| static int Aig_ObjIsPi | ( | Aig_Obj_t * | pObj | ) | [inline, static] |
Definition at line 208 of file aig.h.
00208 { return pObj->Type == AIG_OBJ_PI; }
| static int Aig_ObjIsPo | ( | Aig_Obj_t * | pObj | ) | [inline, static] |
Definition at line 209 of file aig.h.
00209 { return pObj->Type == AIG_OBJ_PO; }
| static int Aig_ObjIsTerm | ( | Aig_Obj_t * | pObj | ) | [inline, static] |
Definition at line 215 of file aig.h.
00215 { return pObj->Type == AIG_OBJ_PI || pObj->Type == AIG_OBJ_PO || pObj->Type == AIG_OBJ_CONST1; }
| static int Aig_ObjLevel | ( | Aig_Obj_t * | pObj | ) | [inline, static] |
| static int Aig_ObjLevelNew | ( | Aig_Obj_t * | pObj | ) | [inline, static] |
Definition at line 246 of file aig.h.
00246 { return Aig_ObjFanin1(pObj)? 1 + Aig_ObjIsExor(pObj) + AIG_MAX(Aig_ObjFanin0(pObj)->Level, Aig_ObjFanin1(pObj)->Level) : Aig_ObjFanin0(pObj)->Level; }
| void Aig_ObjOrderAdvance | ( | Aig_Man_t * | p | ) |
Function*************************************************************
Synopsis [Advances the order forward.]
Description []
SideEffects []
SeeAlso []
Definition at line 159 of file aigOrder.c.
00160 { 00161 assert( p->pOrderData ); 00162 assert( p->pOrderData[2*p->iPrev+1] == (unsigned)p->iNext ); 00163 p->iPrev = p->iNext; 00164 p->nAndPrev++; 00165 }
| void Aig_ObjOrderInsert | ( | Aig_Man_t * | p, | |
| int | ObjId | |||
| ) |
Function*************************************************************
Synopsis [Inserts an entry before iNext.]
Description []
SideEffects []
SeeAlso []
Definition at line 92 of file aigOrder.c.
00093 { 00094 int iPrev; 00095 assert( ObjId != 0 ); 00096 assert( Aig_ObjIsNode( Aig_ManObj(p, ObjId) ) ); 00097 if ( ObjId >= p->nOrderAlloc ) 00098 { 00099 int nOrderAlloc = 2 * ObjId; 00100 p->pOrderData = REALLOC( unsigned, p->pOrderData, 2 * nOrderAlloc ); 00101 memset( p->pOrderData + 2 * p->nOrderAlloc, 0xFF, sizeof(unsigned) * 2 * (nOrderAlloc - p->nOrderAlloc) ); 00102 p->nOrderAlloc = nOrderAlloc; 00103 } 00104 assert( p->pOrderData[2*ObjId] == 0xFFFFFFFF ); // prev 00105 assert( p->pOrderData[2*ObjId+1] == 0xFFFFFFFF ); // next 00106 iPrev = p->pOrderData[2*p->iNext]; 00107 assert( p->pOrderData[2*iPrev+1] == (unsigned)p->iNext ); 00108 p->pOrderData[2*ObjId] = iPrev; 00109 p->pOrderData[2*iPrev+1] = ObjId; 00110 p->pOrderData[2*p->iNext] = ObjId; 00111 p->pOrderData[2*ObjId+1] = p->iNext; 00112 p->nAndTotal++; 00113 }
| void Aig_ObjOrderRemove | ( | Aig_Man_t * | p, | |
| int | ObjId | |||
| ) |
Function*************************************************************
Synopsis [Removes the entry.]
Description [If iPrev is removed, it slides backward. If iNext is removed, it slides forward.]
SideEffects []
SeeAlso []
Definition at line 127 of file aigOrder.c.
00128 { 00129 int iPrev, iNext; 00130 assert( ObjId != 0 ); 00131 assert( Aig_ObjIsNode( Aig_ManObj(p, ObjId) ) ); 00132 iPrev = p->pOrderData[2*ObjId]; 00133 iNext = p->pOrderData[2*ObjId+1]; 00134 p->pOrderData[2*ObjId] = 0xFFFFFFFF; 00135 p->pOrderData[2*ObjId+1] = 0xFFFFFFFF; 00136 p->pOrderData[2*iNext] = iPrev; 00137 p->pOrderData[2*iPrev+1] = iNext; 00138 if ( p->iPrev == ObjId ) 00139 { 00140 p->nAndPrev--; 00141 p->iPrev = iPrev; 00142 } 00143 if ( p->iNext == ObjId ) 00144 p->iNext = iNext; 00145 p->nAndTotal--; 00146 }
Function*************************************************************
Synopsis [Replaces the first fanin of the node by the new fanin.]
Description []
SideEffects []
SeeAlso []
Definition at line 248 of file aigObj.c.
00249 { 00250 Aig_Obj_t * pFaninOld; 00251 assert( !Aig_IsComplement(pObj) ); 00252 assert( Aig_ObjIsPo(pObj) ); 00253 pFaninOld = Aig_ObjFanin0(pObj); 00254 // decrement ref and remove fanout 00255 if ( p->pFanData ) 00256 Aig_ObjRemoveFanout( p, pFaninOld, pObj ); 00257 Aig_ObjDeref( pFaninOld ); 00258 // update the fanin 00259 pObj->pFanin0 = pFaninNew; 00260 // increment ref and add fanout 00261 if ( p->pFanData ) 00262 Aig_ObjAddFanout( p, Aig_ObjFanin0(pObj), pObj ); 00263 Aig_ObjRef( Aig_ObjFanin0(pObj) ); 00264 // get rid of old fanin 00265 if ( !Aig_ObjIsPi(pFaninOld) && !Aig_ObjIsConst1(pFaninOld) && Aig_ObjRefs(pFaninOld) == 0 ) 00266 Aig_ObjDelete_rec( p, pFaninOld, 1 ); 00267 }
| static int Aig_ObjPhase | ( | Aig_Obj_t * | pObj | ) | [inline, static] |
| static int Aig_ObjPhaseReal | ( | Aig_Obj_t * | pObj | ) | [inline, static] |
Definition at line 230 of file aig.h.
00230 { return pObj? Aig_Regular(pObj)->fPhase ^ Aig_IsComplement(pObj) : 1; }
Function*************************************************************
Synopsis [Prints Eqn formula for the AIG rooted at this node.]
Description [The formula is in terms of PIs, which should have their names assigned in pObj->pData fields.]
SideEffects []
SeeAlso []
Definition at line 454 of file aigUtil.c.
00455 { 00456 Vec_Ptr_t * vSuper; 00457 Aig_Obj_t * pFanin; 00458 int fCompl, i; 00459 // store the complemented attribute 00460 fCompl = Aig_IsComplement(pObj); 00461 pObj = Aig_Regular(pObj); 00462 // constant case 00463 if ( Aig_ObjIsConst1(pObj) ) 00464 { 00465 fprintf( pFile, "%d", !fCompl ); 00466 return; 00467 } 00468 // PI case 00469 if ( Aig_ObjIsPi(pObj) ) 00470 { 00471 fprintf( pFile, "%s%s", fCompl? "!" : "", (char*)pObj->pData ); 00472 return; 00473 } 00474 // AND case 00475 Vec_VecExpand( vLevels, Level ); 00476 vSuper = Vec_VecEntry(vLevels, Level); 00477 Aig_ObjCollectMulti( pObj, vSuper ); 00478 fprintf( pFile, "%s", (Level==0? "" : "(") ); 00479 Vec_PtrForEachEntry( vSuper, pFanin, i ) 00480 { 00481 Aig_ObjPrintEqn( pFile, Aig_NotCond(pFanin, fCompl), vLevels, Level+1 ); 00482 if ( i < Vec_PtrSize(vSuper) - 1 ) 00483 fprintf( pFile, " %s ", fCompl? "+" : "*" ); 00484 } 00485 fprintf( pFile, "%s", (Level==0? "" : ")") ); 00486 return; 00487 }
| void Aig_ObjPrintVerbose | ( | Aig_Obj_t * | pObj, | |
| int | fHaig | |||
| ) |
Function*************************************************************
Synopsis [Prints node in HAIG.]
Description []
SideEffects []
SeeAlso []
Definition at line 588 of file aigUtil.c.
00589 { 00590 assert( !Aig_IsComplement(pObj) ); 00591 printf( "Node %p : ", pObj ); 00592 if ( Aig_ObjIsConst1(pObj) ) 00593 printf( "constant 1" ); 00594 else if ( Aig_ObjIsPi(pObj) ) 00595 printf( "PI" ); 00596 else 00597 printf( "AND( %p%s, %p%s )", 00598 Aig_ObjFanin0(pObj), (Aig_ObjFaninC0(pObj)? "\'" : " "), 00599 Aig_ObjFanin1(pObj), (Aig_ObjFaninC1(pObj)? "\'" : " ") ); 00600 printf( " (refs = %3d)", Aig_ObjRefs(pObj) ); 00601 }
Function*************************************************************
Synopsis [Prints Verilog formula for the AIG rooted at this node.]
Description [The formula is in terms of PIs, which should have their names assigned in pObj->pData fields.]
SideEffects []
SeeAlso []
Definition at line 501 of file aigUtil.c.
00502 { 00503 Vec_Ptr_t * vSuper; 00504 Aig_Obj_t * pFanin, * pFanin0, * pFanin1, * pFaninC; 00505 int fCompl, i; 00506 // store the complemented attribute 00507 fCompl = Aig_IsComplement(pObj); 00508 pObj = Aig_Regular(pObj); 00509 // constant case 00510 if ( Aig_ObjIsConst1(pObj) ) 00511 { 00512 fprintf( pFile, "1\'b%d", !fCompl ); 00513 return; 00514 } 00515 // PI case 00516 if ( Aig_ObjIsPi(pObj) ) 00517 { 00518 fprintf( pFile, "%s%s", fCompl? "~" : "", (char*)pObj->pData ); 00519 return; 00520 } 00521 // EXOR case 00522 if ( Aig_ObjIsExor(pObj) ) 00523 { 00524 Vec_VecExpand( vLevels, Level ); 00525 vSuper = Vec_VecEntry( vLevels, Level ); 00526 Aig_ObjCollectMulti( pObj, vSuper ); 00527 fprintf( pFile, "%s", (Level==0? "" : "(") ); 00528 Vec_PtrForEachEntry( vSuper, pFanin, i ) 00529 { 00530 Aig_ObjPrintVerilog( pFile, Aig_NotCond(pFanin, (fCompl && i==0)), vLevels, Level+1 ); 00531 if ( i < Vec_PtrSize(vSuper) - 1 ) 00532 fprintf( pFile, " ^ " ); 00533 } 00534 fprintf( pFile, "%s", (Level==0? "" : ")") ); 00535 return; 00536 } 00537 // MUX case 00538 if ( Aig_ObjIsMuxType(pObj) ) 00539 { 00540 if ( Aig_ObjRecognizeExor( pObj, &pFanin0, &pFanin1 ) ) 00541 { 00542 fprintf( pFile, "%s", (Level==0? "" : "(") ); 00543 Aig_ObjPrintVerilog( pFile, Aig_NotCond(pFanin0, fCompl), vLevels, Level+1 ); 00544 fprintf( pFile, " ^ " ); 00545 Aig_ObjPrintVerilog( pFile, pFanin1, vLevels, Level+1 ); 00546 fprintf( pFile, "%s", (Level==0? "" : ")") ); 00547 } 00548 else 00549 { 00550 pFaninC = Aig_ObjRecognizeMux( pObj, &pFanin1, &pFanin0 ); 00551 fprintf( pFile, "%s", (Level==0? "" : "(") ); 00552 Aig_ObjPrintVerilog( pFile, pFaninC, vLevels, Level+1 ); 00553 fprintf( pFile, " ? " ); 00554 Aig_ObjPrintVerilog( pFile, Aig_NotCond(pFanin1, fCompl), vLevels, Level+1 ); 00555 fprintf( pFile, " : " ); 00556 Aig_ObjPrintVerilog( pFile, Aig_NotCond(pFanin0, fCompl), vLevels, Level+1 ); 00557 fprintf( pFile, "%s", (Level==0? "" : ")") ); 00558 } 00559 return; 00560 } 00561 // AND case 00562 Vec_VecExpand( vLevels, Level ); 00563 vSuper = Vec_VecEntry(vLevels, Level); 00564 Aig_ObjCollectMulti( pObj, vSuper ); 00565 fprintf( pFile, "%s", (Level==0? "" : "(") ); 00566 Vec_PtrForEachEntry( vSuper, pFanin, i ) 00567 { 00568 Aig_ObjPrintVerilog( pFile, Aig_NotCond(pFanin, fCompl), vLevels, Level+1 ); 00569 if ( i < Vec_PtrSize(vSuper) - 1 ) 00570 fprintf( pFile, " %s ", fCompl? "|" : "&" ); 00571 } 00572 fprintf( pFile, "%s", (Level==0? "" : ")") ); 00573 return; 00574 }
Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
Definition at line 432 of file aigUtil.c.
00433 { 00434 Aig_Obj_t * pObjNew, * pObjR = Aig_Regular(pObj); 00435 if ( !Aig_ObjIsBuf(pObjR) ) 00436 return pObj; 00437 pObjNew = Aig_ObjReal_rec( Aig_ObjChild0(pObjR) ); 00438 return Aig_NotCond( pObjNew, Aig_IsComplement(pObj) ); 00439 }
Function*************************************************************
Synopsis [Recognizes what nodes are inputs of the EXOR.]
Description []
SideEffects []
SeeAlso []
Definition at line 299 of file aigUtil.c.
00300 { 00301 Aig_Obj_t * p0, * p1; 00302 assert( !Aig_IsComplement(pObj) ); 00303 if ( !Aig_ObjIsNode(pObj) ) 00304 return 0; 00305 if ( Aig_ObjIsExor(pObj) ) 00306 { 00307 *ppFan0 = Aig_ObjChild0(pObj); 00308 *ppFan1 = Aig_ObjChild1(pObj); 00309 return 1; 00310 } 00311 assert( Aig_ObjIsAnd(pObj) ); 00312 p0 = Aig_ObjChild0(pObj); 00313 p1 = Aig_ObjChild1(pObj); 00314 if ( !Aig_IsComplement(p0) || !Aig_IsComplement(p1) ) 00315 return 0; 00316 p0 = Aig_Regular(p0); 00317 p1 = Aig_Regular(p1); 00318 if ( !Aig_ObjIsAnd(p0) || !Aig_ObjIsAnd(p1) ) 00319 return 0; 00320 if ( Aig_ObjFanin0(p0) != Aig_ObjFanin0(p1) || Aig_ObjFanin1(p0) != Aig_ObjFanin1(p1) ) 00321 return 0; 00322 if ( Aig_ObjFaninC0(p0) == Aig_ObjFaninC0(p1) || Aig_ObjFaninC1(p0) == Aig_ObjFaninC1(p1) ) 00323 return 0; 00324 *ppFan0 = Aig_ObjChild0(p0); 00325 *ppFan1 = Aig_ObjChild1(p0); 00326 return 1; 00327 }
Function*************************************************************
Synopsis [Recognizes what nodes are control and data inputs of a MUX.]
Description [If the node is a MUX, returns the control variable C. Assigns nodes T and E to be the then and else variables of the MUX. Node C is never complemented. Nodes T and E can be complemented. This function also recognizes EXOR/NEXOR gates as MUXes.]
SideEffects []
SeeAlso []
Definition at line 343 of file aigUtil.c.
00344 { 00345 Aig_Obj_t * pNode0, * pNode1; 00346 assert( !Aig_IsComplement(pNode) ); 00347 assert( Aig_ObjIsMuxType(pNode) ); 00348 // get children 00349 pNode0 = Aig_ObjFanin0(pNode); 00350 pNode1 = Aig_ObjFanin1(pNode); 00351 00352 // find the control variable 00353 if ( Aig_ObjFanin1(pNode0) == Aig_ObjFanin1(pNode1) && (Aig_ObjFaninC1(pNode0) ^ Aig_ObjFaninC1(pNode1)) ) 00354 { 00355 // if ( Fraig_IsComplement(pNode1->p2) ) 00356 if ( Aig_ObjFaninC1(pNode0) ) 00357 { // pNode2->p2 is positive phase of C 00358 *ppNodeT = Aig_Not(Aig_ObjChild0(pNode1));//pNode2->p1); 00359 *ppNodeE = Aig_Not(Aig_ObjChild0(pNode0));//pNode1->p1); 00360 return Aig_ObjChild1(pNode1);//pNode2->p2; 00361 } 00362 else 00363 { // pNode1->p2 is positive phase of C 00364 *ppNodeT = Aig_Not(Aig_ObjChild0(pNode0));//pNode1->p1); 00365 *ppNodeE = Aig_Not(Aig_ObjChild0(pNode1));//pNode2->p1); 00366 return Aig_ObjChild1(pNode0);//pNode1->p2; 00367 } 00368 } 00369 else if ( Aig_ObjFanin0(pNode0) == Aig_ObjFanin0(pNode1) && (Aig_ObjFaninC0(pNode0) ^ Aig_ObjFaninC0(pNode1)) ) 00370 { 00371 // if ( Fraig_IsComplement(pNode1->p1) ) 00372 if ( Aig_ObjFaninC0(pNode0) ) 00373 { // pNode2->p1 is positive phase of C 00374 *ppNodeT = Aig_Not(Aig_ObjChild1(pNode1));//pNode2->p2); 00375 *ppNodeE = Aig_Not(Aig_ObjChild1(pNode0));//pNode1->p2); 00376 return Aig_ObjChild0(pNode1);//pNode2->p1; 00377 } 00378 else 00379 { // pNode1->p1 is positive phase of C 00380 *ppNodeT = Aig_Not(Aig_ObjChild1(pNode0));//pNode1->p2); 00381 *ppNodeE = Aig_Not(Aig_ObjChild1(pNode1));//pNode2->p2); 00382 return Aig_ObjChild0(pNode0);//pNode1->p1; 00383 } 00384 } 00385 else if ( Aig_ObjFanin0(pNode0) == Aig_ObjFanin1(pNode1) && (Aig_ObjFaninC0(pNode0) ^ Aig_ObjFaninC1(pNode1)) ) 00386 { 00387 // if ( Fraig_IsComplement(pNode1->p1) ) 00388 if ( Aig_ObjFaninC0(pNode0) ) 00389 { // pNode2->p2 is positive phase of C 00390 *ppNodeT = Aig_Not(Aig_ObjChild0(pNode1));//pNode2->p1); 00391 *ppNodeE = Aig_Not(Aig_ObjChild1(pNode0));//pNode1->p2); 00392 return Aig_ObjChild1(pNode1);//pNode2->p2; 00393 } 00394 else 00395 { // pNode1->p1 is positive phase of C 00396 *ppNodeT = Aig_Not(Aig_ObjChild1(pNode0));//pNode1->p2); 00397 *ppNodeE = Aig_Not(Aig_ObjChild0(pNode1));//pNode2->p1); 00398 return Aig_ObjChild0(pNode0);//pNode1->p1; 00399 } 00400 } 00401 else if ( Aig_ObjFanin1(pNode0) == Aig_ObjFanin0(pNode1) && (Aig_ObjFaninC1(pNode0) ^ Aig_ObjFaninC0(pNode1)) ) 00402 { 00403 // if ( Fraig_IsComplement(pNode1->p2) ) 00404 if ( Aig_ObjFaninC1(pNode0) ) 00405 { // pNode2->p1 is positive phase of C 00406 *ppNodeT = Aig_Not(Aig_ObjChild1(pNode1));//pNode2->p2); 00407 *ppNodeE = Aig_Not(Aig_ObjChild0(pNode0));//pNode1->p1); 00408 return Aig_ObjChild0(pNode1);//pNode2->p1; 00409 } 00410 else 00411 { // pNode1->p2 is positive phase of C 00412 *ppNodeT = Aig_Not(Aig_ObjChild0(pNode0));//pNode1->p1); 00413 *ppNodeE = Aig_Not(Aig_ObjChild1(pNode1));//pNode2->p2); 00414 return Aig_ObjChild1(pNode0);//pNode1->p2; 00415 } 00416 } 00417 assert( 0 ); // this is not MUX 00418 return NULL; 00419 }
| static void Aig_ObjRef | ( | Aig_Obj_t * | pObj | ) | [inline, static] |
| static int Aig_ObjRefs | ( | Aig_Obj_t * | pObj | ) | [inline, static] |
Function*************************************************************
Synopsis [Removes fanout (pFanout) of node (pObj).]
Description []
SideEffects []
SeeAlso []
Definition at line 151 of file aigFanout.c.
00152 { 00153 int iFan, * pFirst, * pPrevC, * pNextC, * pPrev, * pNext; 00154 assert( p->pFanData && pObj->Id < p->nFansAlloc && pFanout->Id < p->nFansAlloc ); 00155 assert( !Aig_IsComplement(pObj) && !Aig_IsComplement(pFanout) ); 00156 assert( pFanout->Id > 0 ); 00157 iFan = Aig_FanoutCreate( pFanout->Id, Aig_ObjWhatFanin(pFanout, pObj) ); 00158 pPrevC = Aig_FanoutPrev( p->pFanData, iFan ); 00159 pNextC = Aig_FanoutNext( p->pFanData, iFan ); 00160 pPrev = Aig_FanoutPrev( p->pFanData, *pNextC ); 00161 pNext = Aig_FanoutNext( p->pFanData, *pPrevC ); 00162 assert( *pPrev == iFan ); 00163 assert( *pNext == iFan ); 00164 pFirst = Aig_FanoutObj( p->pFanData, pObj->Id ); 00165 assert( *pFirst > 0 ); 00166 if ( *pFirst == iFan ) 00167 { 00168 if ( *pNextC == iFan ) 00169 { 00170 *pFirst = 0; 00171 *pPrev = 0; 00172 *pNext = 0; 00173 *pPrevC = 0; 00174 *pNextC = 0; 00175 return; 00176 } 00177 *pFirst = *pNextC; 00178 } 00179 *pPrev = *pPrevC; 00180 *pNext = *pNextC; 00181 *pPrevC = 0; 00182 *pNextC = 0; 00183 }
| void Aig_ObjReplace | ( | Aig_Man_t * | p, | |
| Aig_Obj_t * | pObjOld, | |||
| Aig_Obj_t * | pObjNew, | |||
| int | fNodesOnly, | |||
| int | fUpdateLevel | |||
| ) |
Function*************************************************************
Synopsis [Replaces one object by another.]
Description [The new object (pObjNew) should be used instead of the old object (pObjOld). If the new object is complemented or used, the buffer is added and the new object remains in the manager; otherwise, the new object is deleted.]
SideEffects []
SeeAlso []
Definition at line 354 of file aigObj.c.
00355 { 00356 Aig_Obj_t * pObjNewR = Aig_Regular(pObjNew); 00357 // the object to be replaced cannot be complemented 00358 assert( !Aig_IsComplement(pObjOld) ); 00359 // the object to be replaced cannot be a terminal 00360 assert( !Aig_ObjIsPi(pObjOld) && !Aig_ObjIsPo(pObjOld) ); 00361 // the object to be used cannot be a buffer or a PO 00362 assert( !Aig_ObjIsBuf(pObjNewR) && !Aig_ObjIsPo(pObjNewR) ); 00363 // the object cannot be the same 00364 assert( pObjOld != pObjNewR ); 00365 // make sure object is not pointing to itself 00366 assert( pObjOld != Aig_ObjFanin0(pObjNewR) ); 00367 assert( pObjOld != Aig_ObjFanin1(pObjNewR) ); 00368 // recursively delete the old node - but leave the object there 00369 pObjNewR->nRefs++; 00370 Aig_ObjDelete_rec( p, pObjOld, 0 ); 00371 pObjNewR->nRefs--; 00372 // if the new object is complemented or already used, create a buffer 00373 p->nObjs[pObjOld->Type]--; 00374 if ( Aig_IsComplement(pObjNew) || Aig_ObjRefs(pObjNew) > 0 || (fNodesOnly && !Aig_ObjIsNode(pObjNew)) ) 00375 { 00376 pObjOld->Type = AIG_OBJ_BUF; 00377 Aig_ObjConnect( p, pObjOld, pObjNew, NULL ); 00378 p->nBufReplaces++; 00379 } 00380 else 00381 { 00382 Aig_Obj_t * pFanin0 = pObjNew->pFanin0; 00383 Aig_Obj_t * pFanin1 = pObjNew->pFanin1; 00384 int LevelOld = pObjOld->Level; 00385 pObjOld->Type = pObjNew->Type; 00386 Aig_ObjDisconnect( p, pObjNew ); 00387 Aig_ObjConnect( p, pObjOld, pFanin0, pFanin1 ); 00388 // delete the new object 00389 Aig_ObjDelete( p, pObjNew ); 00390 // update levels 00391 if ( p->pFanData ) 00392 { 00393 pObjOld->Level = LevelOld; 00394 Aig_ManUpdateLevel( p, pObjOld ); 00395 } 00396 if ( fUpdateLevel ) 00397 { 00398 Aig_ObjClearReverseLevel( p, pObjOld ); 00399 Aig_ManUpdateReverseLevel( p, pObjOld ); 00400 } 00401 } 00402 p->nObjs[pObjOld->Type]++; 00403 // store buffers if fanout is allocated 00404 if ( p->pFanData && Aig_ObjIsBuf(pObjOld) ) 00405 { 00406 Vec_PtrPush( p->vBufs, pObjOld ); 00407 p->nBufMax = AIG_MAX( p->nBufMax, Vec_PtrSize(p->vBufs) ); 00408 Aig_ManPropagateBuffers( p, fNodesOnly, fUpdateLevel ); 00409 } 00410 }
Function*************************************************************
Synopsis [Returns required level of the node.]
Description [Converts the reverse levels of the node into its required level as follows: ReqLevel(Node) = MaxLevels(Ntk) + 1 - LevelR(Node).]
SideEffects []
SeeAlso []
Definition at line 97 of file aigTiming.c.
00098 { 00099 assert( p->vLevelR ); 00100 return p->nLevelMax + 1 - Aig_ObjReverseLevel(p, pObj); 00101 }
| static void Aig_ObjSetMarkA | ( | Aig_Obj_t * | pObj | ) | [inline, static] |
| static void Aig_ObjSetTravId | ( | Aig_Obj_t * | pObj, | |
| int | TravId | |||
| ) | [inline, static] |
| static Aig_Type_t Aig_ObjType | ( | Aig_Obj_t * | pObj | ) | [inline, static] |
Definition at line 205 of file aig.h.
00205 { return (Aig_Type_t)pObj->Type; }
Definition at line 250 of file aig.h.
00251 { 00252 if ( Aig_ObjFanin0(pObj) == pFanin ) return 0; 00253 if ( Aig_ObjFanin1(pObj) == pFanin ) return 1; 00254 assert(0); return -1; 00255 }
| Aig_Obj_t* Aig_Oper | ( | Aig_Man_t * | p, | |
| Aig_Obj_t * | p0, | |||
| Aig_Obj_t * | p1, | |||
| Aig_Type_t | Type | |||
| ) |
Function*************************************************************
Synopsis [Perform one operation.]
Description [The argument nodes can be complemented.]
SideEffects []
SeeAlso []
Definition at line 80 of file aigOper.c.
00081 { 00082 if ( Type == AIG_OBJ_AND ) 00083 return Aig_And( p, p0, p1 ); 00084 if ( Type == AIG_OBJ_EXOR ) 00085 return Aig_Exor( p, p0, p1 ); 00086 assert( 0 ); 00087 return NULL; 00088 }
| unsigned Aig_PrimeCudd | ( | unsigned | p | ) |
Function*************************************************************
Synopsis [Counts the support size of the node.]
Description []
SideEffects []
SeeAlso []
Definition at line 440 of file aigDfs.c.
00441 { 00442 int Counter = 0; 00443 assert( !Aig_IsComplement(pObj) ); 00444 assert( !Aig_ObjIsPo(pObj) ); 00445 Aig_ManIncrementTravId( p ); 00446 Aig_SupportSize_rec( p, pObj, &Counter ); 00447 return Counter; 00448 }
| int Aig_TableCountEntries | ( | Aig_Man_t * | p | ) |
Function*************************************************************
Synopsis [Count the number of nodes in the table.]
Description []
SideEffects []
SeeAlso []
Definition at line 229 of file aigTable.c.
00230 { 00231 Aig_Obj_t * pEntry; 00232 int i, Counter = 0; 00233 for ( i = 0; i < p->nTableSize; i++ ) 00234 for ( pEntry = p->pTable[i]; pEntry; pEntry = pEntry->pNext ) 00235 Counter++; 00236 return Counter; 00237 }
Function*************************************************************
Synopsis [Deletes the node from the hash table.]
Description []
SideEffects []
SeeAlso []
Definition at line 207 of file aigTable.c.
00208 { 00209 Aig_Obj_t ** ppPlace; 00210 assert( !Aig_IsComplement(pObj) ); 00211 ppPlace = Aig_TableFind( p, pObj ); 00212 assert( *ppPlace == pObj ); // node should be in the table 00213 // remove the node 00214 *ppPlace = pObj->pNext; 00215 pObj->pNext = NULL; 00216 }
Function*************************************************************
Synopsis [Adds the new node to the hash table.]
Description []
SideEffects []
SeeAlso []
Definition at line 184 of file aigTable.c.
00185 { 00186 Aig_Obj_t ** ppPlace; 00187 assert( !Aig_IsComplement(pObj) ); 00188 assert( Aig_TableLookup(p, pObj) == NULL ); 00189 if ( (pObj->Id & 0xFF) == 0 && 2 * p->nTableSize < Aig_ManNodeNum(p) ) 00190 Aig_TableResize( p ); 00191 ppPlace = Aig_TableFind( p, pObj ); 00192 assert( *ppPlace == NULL ); 00193 *ppPlace = pObj; 00194 }
Function*************************************************************
Synopsis [Checks if node with the given attributes is in the hash table.]
Description []
SideEffects []
SeeAlso []
Definition at line 118 of file aigTable.c.
00119 { 00120 Aig_Obj_t * pEntry; 00121 assert( !Aig_IsComplement(pGhost) ); 00122 if ( pGhost->Type == AIG_OBJ_LATCH ) 00123 { 00124 assert( Aig_ObjChild0(pGhost) && Aig_ObjChild1(pGhost) == NULL ); 00125 if ( !Aig_ObjRefs(Aig_ObjFanin0(pGhost)) ) 00126 return NULL; 00127 } 00128 else 00129 { 00130 assert( pGhost->Type == AIG_OBJ_AND ); 00131 assert( Aig_ObjChild0(pGhost) && Aig_ObjChild1(pGhost) ); 00132 assert( Aig_ObjFanin0(pGhost)->Id < Aig_ObjFanin1(pGhost)->Id ); 00133 if ( !Aig_ObjRefs(Aig_ObjFanin0(pGhost)) || !Aig_ObjRefs(Aig_ObjFanin1(pGhost)) ) 00134 return NULL; 00135 } 00136 for ( pEntry = p->pTable[Aig_Hash(pGhost, p->nTableSize)]; pEntry; pEntry = pEntry->pNext ) 00137 { 00138 if ( Aig_ObjChild0(pEntry) == Aig_ObjChild0(pGhost) && 00139 Aig_ObjChild1(pEntry) == Aig_ObjChild1(pGhost) && 00140 Aig_ObjType(pEntry) == Aig_ObjType(pGhost) ) 00141 return pEntry; 00142 } 00143 return NULL; 00144 }
Function*************************************************************
Synopsis [Checks if node with the given attributes is in the hash table.]
Description []
SideEffects []
SeeAlso []
Definition at line 157 of file aigTable.c.
00158 { 00159 Aig_Obj_t * pGhost; 00160 // consider simple cases 00161 if ( pFanin0 == pFanin1 ) 00162 return pFanin0; 00163 if ( pFanin0 == Aig_Not(pFanin1) ) 00164 return Aig_ManConst0(p); 00165 if ( Aig_Regular(pFanin0) == Aig_ManConst1(p) ) 00166 return pFanin0 == Aig_ManConst1(p) ? pFanin1 : Aig_ManConst0(p); 00167 if ( Aig_Regular(pFanin1) == Aig_ManConst1(p) ) 00168 return pFanin1 == Aig_ManConst1(p) ? pFanin0 : Aig_ManConst0(p); 00169 pGhost = Aig_ObjCreateGhost( p, pFanin0, pFanin1, AIG_OBJ_AND ); 00170 return Aig_TableLookup( p, pGhost ); 00171 }
| void Aig_TableProfile | ( | Aig_Man_t * | p | ) |
Function********************************************************************
Synopsis [Profiles the hash table.]
Description []
SideEffects []
SeeAlso []
Definition at line 250 of file aigTable.c.
00251 { 00252 Aig_Obj_t * pEntry; 00253 int i, Counter; 00254 for ( i = 0; i < p->nTableSize; i++ ) 00255 { 00256 Counter = 0; 00257 for ( pEntry = p->pTable[i]; pEntry; pEntry = pEntry->pNext ) 00258 Counter++; 00259 if ( Counter ) 00260 printf( "%d ", Counter ); 00261 } 00262 }
| void Aig_TManCreateBox | ( | Aig_TMan_t * | p, | |
| int * | pPis, | |||
| int | nPis, | |||
| int * | pPos, | |||
| int | nPos, | |||
| float * | pPiTimes, | |||
| float * | pPoTimes | |||
| ) |
Function*************************************************************
Synopsis [Creates the new timing box.]
Description []
SideEffects []
SeeAlso []
Definition at line 128 of file aigTime.c.
00129 { 00130 Aig_TBox_t * pBox; 00131 int i; 00132 pBox = (Aig_TBox_t *)Aig_MmFlexEntryFetch( p->pMemObj, sizeof(Aig_TBox_t) + sizeof(int) * (nPis+nPos) ); 00133 memset( pBox, 0, sizeof(Aig_TBox_t) ); 00134 pBox->iBox = Vec_PtrSize( p->vBoxes ); 00135 Vec_PtrPush( p->vBoxes, pBox ); 00136 pBox->nInputs = nPis; 00137 pBox->nOutputs = nPos; 00138 for ( i = 0; i < nPis; i++ ) 00139 { 00140 assert( pPis[i] < p->nPis ); 00141 pBox->Inouts[i] = pPis[i]; 00142 Aig_TManSetPiArrival( p, pPis[i], pPiTimes[i] ); 00143 p->pPis[pPis[i]].iObj2Box = pBox->iBox; 00144 } 00145 for ( i = 0; i < nPos; i++ ) 00146 { 00147 assert( pPos[i] < p->nPos ); 00148 pBox->Inouts[nPis+i] = pPos[i]; 00149 Aig_TManSetPoRequired( p, pPos[i], pPoTimes[i] ); 00150 p->pPos[pPos[i]].iObj2Box = pBox->iBox; 00151 } 00152 }
| float Aig_TManGetPiArrival | ( | Aig_TMan_t * | p, | |
| int | iPi | |||
| ) |
Function*************************************************************
Synopsis [Returns PI arrival time.]
Description []
SideEffects []
SeeAlso []
Definition at line 249 of file aigTime.c.
00250 { 00251 Aig_TBox_t * pBox; 00252 Aig_TObj_t * pObj; 00253 float DelayMax; 00254 int i; 00255 assert( iPi < p->nPis ); 00256 if ( p->pPis[iPi].iObj2Box < 0 ) 00257 return p->pPis[iPi].timeOffset; 00258 pBox = Vec_PtrEntry( p->vBoxes, p->pPis[iPi].iObj2Box ); 00259 // check if box timing is updated 00260 if ( pBox->TravId == p->nTravIds ) 00261 return p->pPis[iPi].timeOffset; 00262 pBox->TravId = p->nTravIds; 00263 // update box timing 00264 DelayMax = -1.0e+20F; 00265 for ( i = 0; i < pBox->nOutputs; i++ ) 00266 { 00267 pObj = p->pPos + pBox->Inouts[pBox->nInputs+i]; 00268 DelayMax = AIG_MAX( DelayMax, pObj->timeActual + pObj->timeOffset ); 00269 } 00270 for ( i = 0; i < pBox->nInputs; i++ ) 00271 { 00272 pObj = p->pPis + pBox->Inouts[i]; 00273 pObj->timeActual = DelayMax + pObj->timeOffset; 00274 } 00275 return p->pPis[iPi].timeActual; 00276 }
| float Aig_TManGetPoRequired | ( | Aig_TMan_t * | p, | |
| int | iPo | |||
| ) |
| void Aig_TManIncrementTravId | ( | Aig_TMan_t * | p | ) |
| void Aig_TManSetPiArrival | ( | Aig_TMan_t * | p, | |
| int | iPi, | |||
| float | Delay | |||
| ) |
Function*************************************************************
Synopsis [Creates the new timing box.]
Description []
SideEffects []
SeeAlso []
Definition at line 199 of file aigTime.c.
00200 { 00201 assert( iPi < p->nPis ); 00202 p->pPis[iPi].timeOffset = Delay; 00203 }
| void Aig_TManSetPiDelay | ( | Aig_TMan_t * | p, | |
| int | iPi, | |||
| float | Delay | |||
| ) |
Function*************************************************************
Synopsis [Creates the new timing box.]
Description []
SideEffects []
SeeAlso []
Definition at line 165 of file aigTime.c.
00166 { 00167 assert( iPi < p->nPis ); 00168 p->pPis[iPi].timeActual = Delay; 00169 }
| void Aig_TManSetPoDelay | ( | Aig_TMan_t * | p, | |
| int | iPo, | |||
| float | Delay | |||
| ) |
Function*************************************************************
Synopsis [Creates the new timing box.]
Description []
SideEffects []
SeeAlso []
Definition at line 182 of file aigTime.c.
00183 { 00184 assert( iPo < p->nPos ); 00185 p->pPos[iPo].timeActual = Delay; 00186 }
| void Aig_TManSetPoRequired | ( | Aig_TMan_t * | p, | |
| int | iPo, | |||
| float | Delay | |||
| ) |
Function*************************************************************
Synopsis [Creates the new timing box.]
Description []
SideEffects []
SeeAlso []
Definition at line 216 of file aigTime.c.
00217 { 00218 assert( iPo < p->nPos ); 00219 p->pPos[iPo].timeOffset = Delay; 00220 }
| Aig_TMan_t* Aig_TManStart | ( | int | nPis, | |
| int | nPos | |||
| ) |
FUNCTION DEFINITIONS ///Function*************************************************************
Synopsis [Starts the network manager.]
Description []
SideEffects []
SeeAlso []
Definition at line 75 of file aigTime.c.
00076 { 00077 Aig_TMan_t * p; 00078 int i; 00079 p = ALLOC( Aig_TMan_t, 1 ); 00080 memset( p, 0, sizeof(Aig_TMan_t) ); 00081 p->pMemObj = Aig_MmFlexStart(); 00082 p->vBoxes = Vec_PtrAlloc( 100 ); 00083 Vec_PtrPush( p->vBoxes, NULL ); 00084 p->nPis = nPis; 00085 p->nPos = nPos; 00086 p->pPis = ALLOC( Aig_TObj_t, nPis ); 00087 memset( p->pPis, 0, sizeof(Aig_TObj_t) * nPis ); 00088 p->pPos = ALLOC( Aig_TObj_t, nPos ); 00089 memset( p->pPos, 0, sizeof(Aig_TObj_t) * nPos ); 00090 for ( i = 0; i < nPis; i++ ) 00091 p->pPis[i].iObj2Box = -1; 00092 for ( i = 0; i < nPos; i++ ) 00093 p->pPos[i].iObj2Box = -1; 00094 return p; 00095 }
| void Aig_TManStop | ( | Aig_TMan_t * | p | ) |
Function*************************************************************
Synopsis [Stops the network manager.]
Description []
SideEffects []
SeeAlso []
Definition at line 108 of file aigTime.c.
00109 { 00110 Vec_PtrFree( p->vBoxes ); 00111 Aig_MmFlexStop( p->pMemObj, 0 ); 00112 free( p->pPis ); 00113 free( p->pPos ); 00114 free( p ); 00115 }
Function*************************************************************
Synopsis [Transfers the AIG from one manager into another.]
Description []
SideEffects []
SeeAlso []
Definition at line 484 of file aigDfs.c.
00485 { 00486 Aig_Obj_t * pObj; 00487 int i; 00488 // solve simple cases 00489 if ( pSour == pDest ) 00490 return pRoot; 00491 if ( Aig_ObjIsConst1( Aig_Regular(pRoot) ) ) 00492 return Aig_NotCond( Aig_ManConst1(pDest), Aig_IsComplement(pRoot) ); 00493 // set the PI mapping 00494 Aig_ManForEachPi( pSour, pObj, i ) 00495 { 00496 if ( i == nVars ) 00497 break; 00498 pObj->pData = Aig_IthVar(pDest, i); 00499 } 00500 // transfer and set markings 00501 Aig_Transfer_rec( pDest, Aig_Regular(pRoot) ); 00502 // clear the markings 00503 Aig_ConeUnmark_rec( Aig_Regular(pRoot) ); 00504 return Aig_NotCond( Aig_Regular(pRoot)->pData, Aig_IsComplement(pRoot) ); 00505 }
| static int Aig_TruthWordNum | ( | int | nVars | ) | [inline, static] |
| static char* Aig_UtilStrsav | ( | char * | s | ) | [inline, static] |
| static int Aig_WordCountOnes | ( | unsigned | uWord | ) | [inline, static] |
Definition at line 170 of file aig.h.
00171 { 00172 uWord = (uWord & 0x55555555) + ((uWord>>1) & 0x55555555); 00173 uWord = (uWord & 0x33333333) + ((uWord>>2) & 0x33333333); 00174 uWord = (uWord & 0x0F0F0F0F) + ((uWord>>4) & 0x0F0F0F0F); 00175 uWord = (uWord & 0x00FF00FF) + ((uWord>>8) & 0x00FF00FF); 00176 return (uWord & 0x0000FFFF) + (uWord>>16); 00177 }
Function*************************************************************
Synopsis [Performs forward retiming with the given limit on depth.]
Description []
SideEffects []
SeeAlso []
Definition at line 831 of file aigRet.c.
00832 { 00833 Vec_Ptr_t * vQueue; 00834 Aig_Man_t * pNew; 00835 Rtm_Man_t * pRtm; 00836 Rtm_Obj_t * pObj, * pNext; 00837 Aig_Obj_t * pObjAig; 00838 int i, k, nAutos, Degree, DegreeMax = 0; 00839 int clk; 00840 00841 // create the retiming manager 00842 clk = clock(); 00843 pRtm = Rtm_ManFromAig( p ); 00844 // set registers 00845 Aig_ManForEachLoSeq( p, pObjAig, i ) 00846 Rtm_ObjAddFirst( pRtm, Rtm_ObjEdge(pObjAig->pData, 0), fForward? RTM_VAL_ZERO : RTM_VAL_VOID ); 00847 // detect and mark the autonomous components 00848 if ( fForward ) 00849 nAutos = Rtm_ManMarkAutoFwd( pRtm ); 00850 else 00851 nAutos = Rtm_ManMarkAutoBwd( pRtm ); 00852 if ( fVerbose ) 00853 { 00854 printf( "Detected %d autonomous objects. ", nAutos ); 00855 PRT( "Time", clock() - clk ); 00856 } 00857 00858 // set the current retiming number 00859 Rtm_ManForEachObj( pRtm, pObj, i ) 00860 { 00861 assert( pObj->nFanins == pObj->Num ); 00862 assert( pObj->nFanouts == pObj->Temp ); 00863 pObj->Num = 0; 00864 } 00865 00866 clk = clock(); 00867 // put the LOs on the queue 00868 vQueue = Vec_PtrAlloc( 1000 ); 00869 if ( fForward ) 00870 { 00871 Aig_ManForEachLoSeq( p, pObjAig, i ) 00872 { 00873 pObj = pObjAig->pData; 00874 if ( pObj->fAuto ) 00875 continue; 00876 pObj->fMark = 1; 00877 Vec_PtrPush( vQueue, pObj ); 00878 } 00879 } 00880 else 00881 { 00882 Aig_ManForEachLiSeq( p, pObjAig, i ) 00883 { 00884 pObj = pObjAig->pData; 00885 if ( pObj->fAuto ) 00886 continue; 00887 pObj->fMark = 1; 00888 Vec_PtrPush( vQueue, pObj ); 00889 } 00890 } 00891 // perform retiming 00892 DegreeMax = 0; 00893 Vec_PtrForEachEntry( vQueue, pObj, i ) 00894 { 00895 pObj->fMark = 0; 00896 // retime the node 00897 if ( fForward ) 00898 { 00899 Rtm_ObjRetimeFwd( pRtm, pObj ); 00900 // check if its fanouts should be retimed 00901 Rtm_ObjForEachFanout( pObj, pNext, k ) 00902 { 00903 if ( pNext->fMark ) // skip aleady scheduled 00904 continue; 00905 if ( pNext->Type ) // skip POs 00906 continue; 00907 if ( !Rtm_ObjCheckRetimeFwd( pNext ) ) // skip non-retimable 00908 continue; 00909 Degree = Rtm_ObjGetDegreeFwd( pNext ); 00910 DegreeMax = AIG_MAX( DegreeMax, Degree ); 00911 if ( Degree > nStepsMax ) // skip nodes with high degree 00912 continue; 00913 pNext->fMark = 1; 00914 pNext->Num = Degree; 00915 Vec_PtrPush( vQueue, pNext ); 00916 } 00917 } 00918 else 00919 { 00920 Rtm_ObjRetimeBwd( pRtm, pObj ); 00921 // check if its fanouts should be retimed 00922 Rtm_ObjForEachFanin( pObj, pNext, k ) 00923 { 00924 if ( pNext->fMark ) // skip aleady scheduled 00925 continue; 00926 if ( pNext->nFanins == 0 ) // skip PIs 00927 continue; 00928 if ( !Rtm_ObjCheckRetimeBwd( pNext ) ) // skip non-retimable 00929 continue; 00930 Degree = Rtm_ObjGetDegreeBwd( pNext ); 00931 DegreeMax = AIG_MAX( DegreeMax, Degree ); 00932 if ( Degree > nStepsMax ) // skip nodes with high degree 00933 continue; 00934 pNext->fMark = 1; 00935 pNext->Num = Degree; 00936 Vec_PtrPush( vQueue, pNext ); 00937 } 00938 } 00939 } 00940 00941 if ( fVerbose ) 00942 { 00943 printf( "Performed %d %s latch moves of max depth %d and max latch count %d.\n", 00944 Vec_PtrSize(vQueue), fForward? "fwd":"bwd", DegreeMax, Rtm_ManLatchMax(pRtm) ); 00945 printf( "Memory usage = %d. ", pRtm->nExtraCur ); 00946 PRT( "Time", clock() - clk ); 00947 } 00948 Vec_PtrFree( vQueue ); 00949 00950 // get the new manager 00951 pNew = Rtm_ManToAig( pRtm ); 00952 pNew->pName = Aig_UtilStrsav( p->pName ); 00953 Rtm_ManFree( pRtm ); 00954 // group the registers 00955 clk = clock(); 00956 pNew = Aig_ManReduceLaches( pNew, fVerbose ); 00957 if ( fVerbose ) 00958 { 00959 PRT( "Register sharing time", clock() - clk ); 00960 } 00961 return pNew; 00962 }
