prev FPGA 2002 next
Routing Results

Is buffer/pass switching useful? Yes! but only to reduce area.

  1. delay always worse
    • fanout problems?
    • difficult to tune VPR for this

  2. simple test netlist gives 10% speedup
    • real circuits => many high fanout nets
    • fanout => buffer/pass worse
    • still need some purely-buffered tracks?

  3. delay improvement below: from bufm
Normalized Results
4-input LUT,
6 LUTs per cluster
Criterion Buffer
Type 		Endpoints Midpoints Area Delay Area*Delay
baseline buf buffer buffer 1.0 1.0 1.0
best delay bufm buffer buffer 0.97 0.93 0.91
best area*delay bufm buffer pass 0.91 0.95 0.86
best area bufm alt2 pass 0.87 1.01 0.88