00001
00019 #include "fpgaInt.h"
00020 #include "cudd.h"
00021
00025
00029
00041 DdNode * Fpga_TruthsCutBdd_rec( DdManager * dd, Fpga_Cut_t * pCut, Fpga_NodeVec_t * vVisited )
00042 {
00043 DdNode * bFunc, * bFunc0, * bFunc1;
00044 assert( !Fpga_IsComplement(pCut) );
00045
00046 if ( pCut->uSign )
00047 return (DdNode *)pCut->uSign;
00048
00049 bFunc0 = Fpga_TruthsCutBdd_rec( dd, Fpga_CutRegular(pCut->pOne), vVisited ); Cudd_Ref( bFunc0 );
00050 bFunc0 = Cudd_NotCond( bFunc0, Fpga_CutIsComplement(pCut->pOne) );
00051 bFunc1 = Fpga_TruthsCutBdd_rec( dd, Fpga_CutRegular(pCut->pTwo), vVisited ); Cudd_Ref( bFunc1 );
00052 bFunc1 = Cudd_NotCond( bFunc1, Fpga_CutIsComplement(pCut->pTwo) );
00053
00054 bFunc = Cudd_bddAnd( dd, bFunc0, bFunc1 ); Cudd_Ref( bFunc );
00055 bFunc = Cudd_NotCond( bFunc, pCut->Phase );
00056 Cudd_RecursiveDeref( dd, bFunc0 );
00057 Cudd_RecursiveDeref( dd, bFunc1 );
00058 assert( pCut->uSign == 0 );
00059 pCut->uSign = (unsigned)bFunc;
00060
00061 Fpga_NodeVecPush( vVisited, (Fpga_Node_t *)pCut );
00062 return bFunc;
00063 }
00064
00076 void * Fpga_TruthsCutBdd( void * dd, Fpga_Cut_t * pCut )
00077 {
00078 Fpga_NodeVec_t * vVisited;
00079 DdNode * bFunc;
00080 int i;
00081 assert( pCut->nLeaves > 1 );
00082
00083 for ( i = 0; i < pCut->nLeaves; i++ )
00084 pCut->ppLeaves[i]->pCuts->uSign = (unsigned)Cudd_bddIthVar( dd, i );
00085
00086 vVisited = Fpga_NodeVecAlloc( 10 );
00087 bFunc = Fpga_TruthsCutBdd_rec( dd, pCut, vVisited ); Cudd_Ref( bFunc );
00088
00089 for ( i = 0; i < pCut->nLeaves; i++ )
00090 pCut->ppLeaves[i]->pCuts->uSign = 0;
00091 for ( i = 0; i < vVisited->nSize; i++ )
00092 {
00093 pCut = (Fpga_Cut_t *)vVisited->pArray[i];
00094 Cudd_RecursiveDeref( dd, (DdNode*)pCut->uSign );
00095 pCut->uSign = 0;
00096 }
00097
00098 Fpga_NodeVecFree( vVisited );
00099 Cudd_Deref( bFunc );
00100 return bFunc;
00101 }
00102
00103
00115 void Fpga_CutVolume_rec( Fpga_Cut_t * pCut, Fpga_NodeVec_t * vVisited )
00116 {
00117 assert( !Fpga_IsComplement(pCut) );
00118 if ( pCut->fMark )
00119 return;
00120 pCut->fMark = 1;
00121 Fpga_CutVolume_rec( Fpga_CutRegular(pCut->pOne), vVisited );
00122 Fpga_CutVolume_rec( Fpga_CutRegular(pCut->pTwo), vVisited );
00123 Fpga_NodeVecPush( vVisited, (Fpga_Node_t *)pCut );
00124 }
00125
00137 int Fpga_CutVolume( Fpga_Cut_t * pCut )
00138 {
00139 Fpga_NodeVec_t * vVisited;
00140 int Volume, i;
00141 assert( pCut->nLeaves > 1 );
00142
00143 for ( i = 0; i < pCut->nLeaves; i++ )
00144 pCut->ppLeaves[i]->pCuts->fMark = 1;
00145
00146 vVisited = Fpga_NodeVecAlloc( 10 );
00147 Fpga_CutVolume_rec( pCut, vVisited );
00148
00149 for ( i = 0; i < pCut->nLeaves; i++ )
00150 pCut->ppLeaves[i]->pCuts->fMark = 0;
00151 for ( i = 0; i < vVisited->nSize; i++ )
00152 {
00153 pCut = (Fpga_Cut_t *)vVisited->pArray[i];
00154 pCut->fMark = 0;
00155 }
00156 Volume = vVisited->nSize;
00157 printf( "%d ", Volume );
00158 Fpga_NodeVecFree( vVisited );
00159 return Volume;
00160 }
00161
00165
00166