timing diagram

Patty Lee (u2vinetastrasse@hotmail.com) Wed, 06 Dec 2000 16:37:33 -0800

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From: "Patty Lee" <u2vinetastrasse@hotmail.com>
Subject: timing diagram
Date: Wed, 06 Dec 2000 16:37:33 -0800


Hello everyone,

Please explain the timing diagram for read and write cycles. For example, 
why is there 2 signals for the address bus? And is there a significant 
meaning when they cross?

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Patty
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