Ed Casas (edc@ece.ubc.ca) Thu, 9 Nov 2000 12:08:51 -0800
- Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]
- New Message to:eece379@listhost.ece.ubc.ca
- Reply to:Re: ram entity (internal tri-states)
- Next message: Amy Zheng: "Assignment #3"
- Previous message: Ed Casas: "Re: Assignment #2"
- In reply to: Tang Chui See Cecilia: "Re: Assignment #2"
Date: Thu, 9 Nov 2000 12:08:51 -0800 From: Ed Casas <edc@ece.ubc.ca> Subject: Re: ram entity (internal tri-states)> I'm still having some trouble with my ram entity. ... ... > I have 16 identical errors: > TRI or OPNDRN buffer':27xx' can only drive logic(':yyyy') if > connected to a BIDIR pin. I didn't assign any pins so I'm not > sure what this means. It means you can't use a tri-state output (Z) unless it's connected to a chip output -- you can't use buses with tri-states internally. You don't need to use tri-state outputs in this design because the RAM has separate data input and output signals. -- Ed Casas edc@ece.ubc.ca http://casas.ece.ubc.ca +1 604 822-2592
- Next message: Amy Zheng: "Assignment #3"
- Previous message: Ed Casas: "Re: Assignment #2"
- In reply to: Tang Chui See Cecilia: "Re: Assignment #2"