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Recently, software utilities for automating the translation of floating-point signal-processing applications written in ANSI C into fixed-point versions have been presented. This dissertation investigates a novel fixed-point instruction-set operation, Fractional Multiplication with internal Left Shift (FMLS), and an associated translation algorithm, Intermediate-Result-Profiling based Shift Absorption (IRP-SA), that combine to enhance fixed-point rounding-noise and runtime performance when supported by a conversion utility that directly targets the instruction set. A significant feature of FMLS is that it is well suited to the latest generation of embedded processors that maintain relatively homogeneous register architectures. FMLS may improve the rounding-noise performance of fractional multiplication operations in several ways depending upon the specific fixed-point scaling properties an application exhibits. The IRP-SA algorithm enhances this by exploiting the modular nature of 2's-complement addition, which allows the discarding of most-significant-bits that are redundant due to inter-operand correlations that often arise, for example, in recursive filters with poles close to the unit circle. Rounding-noise reductions equivalent to carrying as much as 2.0 additional bits of precision throughout the computation are demonstrated. Furthermore, by encoding a set of only four shift distances into the FMLS operation, speedups of up to 13 percent are produced while retaining almost all of the noise reduction benefits.

Generally, the conversion process uses profiling to capture the dynamic-range of floating-point variables and intermediate calculations that in turn guides the generation of fixed-point scaling operations. Two enhancements are presented: index-dependent scaling (IDS), and second-order profiling. IDS implements a form of unconditional block-floating-point scaling that can dramatically reduce output rounding-noise. Second-order profiling helps eliminate arithmetic overflows due to the accumulated effects of roundoff errors.