simulate_blif.h File Reference

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Defines
#define	line_t   struct line_t_t
#define	INPUT_VECTOR_FILE_NAME   "input_vectors"
#define	OUTPUT_VECTOR_FILE_NAME   "output_vectors"
Functions
void	simulate_blif (char *test_vector_file_name, netlist_t *netlist)
void	simulate_new_vectors (int num_test_vectors, netlist_t *netlist)

---

Define Documentation

#define INPUT_VECTOR_FILE_NAME   "input_vectors"

Definition at line 6 of file simulate_blif.h.

#define line_t   struct line_t_t

Definition at line 4 of file simulate_blif.h.

#define OUTPUT_VECTOR_FILE_NAME   "output_vectors"

Definition at line 7 of file simulate_blif.h.

---

Function Documentation

void simulate_blif	(	char *	test_vector_file_name,
		netlist_t *	netlist
	)

Definition at line 95 of file simulate_blif.c.

{
        FILE *in;
        char buffer[BUFFER_MAX_SIZE];
        int cycle, i, lines_size;
        line_t **lines;

        sim_type = TEST_EXISTING_VECTORS;
        sim_result = TRUE;              //we're going to assume that everything goes OK for now
        modelsim_out = NULL;
        blocks = create_queue();

        //open our file
        in = fopen(test_vector_file_name, "r");
        if (in == NULL)
        {
                error_message(SIMULATION_ERROR, -1, -1, "Could not open input vectors file %s\n", test_vector_file_name);
        }

        //lines is an array of line_t structs that store a name and an array of pins
        lines = read_test_vector_headers(in, &lines_size, netlist->num_top_input_nodes + netlist->num_top_output_nodes);

        //for each top input node, map it to a line
        for (i = 0; i < netlist->num_top_input_nodes; i++)
                assign_node_to_line(netlist->top_input_nodes[i], lines, lines_size, INPUT);
        //for each top output node, map it to a line
        for (i = 0; i < netlist->num_top_output_nodes; i++)
                assign_node_to_line(netlist->top_output_nodes[i], lines, lines_size, OUTPUT);

        for (i = 0; i < lines_size; i++)
        {
                int j;
                for (j = 0; j < lines[i]->number_of_pins; j++)
                {
                        if (NULL == lines[i]->pins[j])
                        {
                                warning_message(SIMULATION_ERROR, -1, -1, "A line has a NULL pin. This may cause a segfault. This can be caused when registers are declared as reg [X:Y], where Y is greater than zero.");
                        }
                }
        }

        //get a line from our input vectors file and do stuff with it
        cycle = 0;
        while (fgets(buffer, BUFFER_MAX_SIZE, in) != NULL)
        {
                //continues while we can still read lines from the test vector file
#ifdef DEBUG_SIMULATOR
                printf("Cycle: %d\nRead in from file: %s", cycle, buffer);
#endif

                //assigns the test values for the input lines ONLY
                assign_input_vector_to_lines(lines, buffer, cycle);

#ifdef DEBUG_SIMULATOR
                int m,n;
                for (m = 0; m < lines_size; m++)
                {
                        printf("Line %s pin values %d through 0: ", lines[m]->name, lines[m]->number_of_pins-1);
                        for (n = lines[m]->number_of_pins -1; n >= 0; n--)
                        {
                                printf("%d", lines[m]->pins[n]->sim_state->value);
                        }
                        printf("\n");
                }
#endif

                simulate_cycle(netlist, cycle);
                //checks that the output test values match what we simulated
                verify_output_vectors(netlist, lines, lines_size, cycle);

                cycle++;
        }

        //if something went wrong, let the user know. They'll have to search the output
        //for specifics
        if (!sim_result)
        {
                printf("\nSimulation Error\n");
                fprintf(stderr, "Simulation produced invalid data against the test vectors. Please see stderr output for details.");
        }

        fclose(in);
        free_lines(lines, lines_size);
        free_blocks();
}

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void simulate_new_vectors	(	int	num_test_vectors,
		netlist_t *	netlist
	)

Definition at line 187 of file simulate_blif.c.

{
        FILE *iv, *outv;
        int cycle, lines_size;
        line_t **lines;
        int i;

        sim_type = GENERATE_VECTORS;

        blocks = create_queue();

        //open the input and output vector files
        iv = fopen(INPUT_VECTOR_FILE_NAME, "w");
        if (NULL == iv)
        {
                error_message(SIMULATION_ERROR, -1, -1, "Could not write to input vectors file %s\n", INPUT_VECTOR_FILE_NAME);
        }
        outv = fopen(OUTPUT_VECTOR_FILE_NAME, "w");
        if (NULL == outv)
        {
                error_message(SIMULATION_ERROR, -1, -1, "Could not write to output vectors file %s\n", OUTPUT_VECTOR_FILE_NAME);
        }
        modelsim_out = fopen("test.do", "w");
        if (NULL == modelsim_out)
        {
                error_message(SIMULATION_ERROR, -1, -1, "Could not write to modelsim output file\n");
        }

        fprintf(modelsim_out, "force clock 1 0, 0 50 -repeat 100\n");

        //lines will be an array representing the I/O lines of our netlist
        lines = create_test_vector_lines(&lines_size, netlist);

        for (i = 0; i < lines_size; i++)
        {
                int j;
                for (j = 0; j < lines[i]->number_of_pins; j++)
                {
                        if (NULL == lines[i]->pins[j])
                        {
                                warning_message(SIMULATION_ERROR, -1, -1, "A line has a NULL pin. This may cause a segfault.This can be caused when registers are declared as reg [X:Y], where Y is greater than zero.");
                        }
                }
        }

        //write the headers (names of I/O lines) to vector files
        //this is the same format that we're expecting to read in to verify
        //these later
        write_vector_headers(iv, outv, lines, lines_size);

        //used to generate random test vectors
        srand((unsigned)(time(0)));
        
        for (cycle = 0; cycle < num_test_vectors; cycle++)
        {
#ifdef DEBUG_SIMULATOR
                int i;
#endif
                
                assign_random_vector_to_input_lines(lines, lines_size, cycle);

#ifdef DEBUG_SIMULATOR
                printf("Cycle: %d\n", cycle);
                for (i = 0; i < lines_size; i++)
                {
                        int j;

                        if (lines[i]->type == OUTPUT)
                                continue;

                        printf("Values for line %s from %d to 0: ", lines[i]->name, lines[i]->number_of_pins);

                        for (j = 0; j < lines[i]->number_of_pins; j++)
                        {
                                printf("%d", lines[i]->pins[j]->sim_state->value);
                        }

                        printf("\n");
                }
#endif

                write_vectors_to_file(lines, lines_size, iv, INPUT, cycle);
                simulate_cycle(netlist, cycle);
                write_vectors_to_file(lines, lines_size, outv, OUTPUT, cycle);
        }

        fprintf(modelsim_out, "run %d\n", cycle*101);

        fclose(iv);
        fclose(outv);
        fclose(modelsim_out);
        free_lines(lines, lines_size);
        free_blocks();
}

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