src/base/abc/abcNetlist.c File Reference

#include "abc.h"
Include dependency graph for abcNetlist.c:

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Functions

static void Abc_NtkAddPoBuffers (Abc_Ntk_t *pNtk)
static Abc_Ntk_t * Abc_NtkLogicToNetlist (Abc_Ntk_t *pNtk)
static Abc_Ntk_t * Abc_NtkAigToLogicSop (Abc_Ntk_t *pNtk)
static Abc_Ntk_t * Abc_NtkAigToLogicSopBench (Abc_Ntk_t *pNtk)
Abc_Ntk_t * Abc_NtkToLogic (Abc_Ntk_t *pNtk)
Abc_Ntk_t * Abc_NtkToNetlist (Abc_Ntk_t *pNtk)
Abc_Ntk_t * Abc_NtkToNetlistBench (Abc_Ntk_t *pNtk)

Function Documentation

void Abc_NtkAddPoBuffers ( Abc_Ntk_t *  pNtk  )  [static]

CFile****************************************************************

FileName [abcNetlist.c]

SystemName [ABC: Logic synthesis and verification system.]

PackageName [Network and node package.]

Synopsis [Transforms netlist into a logic network and vice versa.]

Author [Alan Mishchenko]

Affiliation [UC Berkeley]

Date [Ver. 1.0. Started - June 20, 2005.]

Revision [

Id
abcNetlist.c,v 1.00 2005/06/20 00:00:00 alanmi Exp

] DECLARATIONS ///

Function*************************************************************

Synopsis [Adds buffers for each PO.]

Description []

SideEffects []

SeeAlso []

Definition at line 393 of file abcNetlist.c.

00394 {
00395     Abc_Obj_t * pObj, * pFanin, * pFaninNew;
00396     int i;
00397     assert( Abc_NtkIsStrash(pNtk) );
00398     Abc_NtkForEachPo( pNtk, pObj, i )
00399     {
00400         pFanin = Abc_ObjChild0(pObj);
00401         pFaninNew = Abc_NtkCreateNode(pNtk);
00402         Abc_ObjAddFanin( pFaninNew, pFanin );
00403         Abc_ObjPatchFanin( pObj, pFanin, pFaninNew );
00404     }
00405 }

Abc_Ntk_t * Abc_NtkAigToLogicSop ( Abc_Ntk_t *  pNtk  )  [static]

Function*************************************************************

Synopsis [Converts the AIG into the logic network with SOPs.]

Description [Correctly handles the case of choice nodes.]

SideEffects []

SeeAlso []

Definition at line 238 of file abcNetlist.c.

00239 {
00240     Abc_Ntk_t * pNtkNew; 
00241     Abc_Obj_t * pObj, * pFanin, * pNodeNew;
00242     Vec_Int_t * vInts;
00243     int i, k;
00244     assert( Abc_NtkIsStrash(pNtk) );
00245     // start the network
00246     pNtkNew = Abc_NtkStartFrom( pNtk, ABC_NTK_LOGIC, ABC_FUNC_SOP );
00247     // if the constant node is used, duplicate it
00248     pObj = Abc_AigConst1(pNtk);
00249     if ( Abc_ObjFanoutNum(pObj) > 0 )
00250         pObj->pCopy = Abc_NtkCreateNodeConst1(pNtkNew);
00251     // duplicate the nodes and create node functions
00252     Abc_NtkForEachNode( pNtk, pObj, i )
00253     {
00254         Abc_NtkDupObj(pNtkNew, pObj, 0);
00255         pObj->pCopy->pData = Abc_SopCreateAnd2( pNtkNew->pManFunc, Abc_ObjFaninC0(pObj), Abc_ObjFaninC1(pObj) );
00256     }
00257     // create the choice nodes
00258     Abc_NtkForEachNode( pNtk, pObj, i )
00259     {
00260         if ( !Abc_AigNodeIsChoice(pObj) )
00261             continue;
00262         // create an OR gate
00263         pNodeNew = Abc_NtkCreateNode(pNtkNew);
00264         // add fanins
00265         vInts = Vec_IntAlloc( 10 );
00266         for ( pFanin = pObj; pFanin; pFanin = pFanin->pData )
00267         {
00268             Vec_IntPush( vInts, (int)(pObj->fPhase != pFanin->fPhase) );
00269             Abc_ObjAddFanin( pNodeNew, pFanin->pCopy );
00270         }
00271         // create the logic function
00272         pNodeNew->pData = Abc_SopCreateOrMultiCube( pNtkNew->pManFunc, Vec_IntSize(vInts), Vec_IntArray(vInts) );
00273         // set the new node
00274         pObj->pCopy->pCopy = pNodeNew;
00275         Vec_IntFree( vInts );
00276     }
00277     // connect the internal nodes
00278     Abc_NtkForEachNode( pNtk, pObj, i )
00279         Abc_ObjForEachFanin( pObj, pFanin, k )
00280             if ( pFanin->pCopy->pCopy )
00281                 Abc_ObjAddFanin( pObj->pCopy, pFanin->pCopy->pCopy );
00282             else
00283                 Abc_ObjAddFanin( pObj->pCopy, pFanin->pCopy );
00284     // connect the COs
00285 //    Abc_NtkFinalize( pNtk, pNtkNew );
00286     Abc_NtkForEachCo( pNtk, pObj, i )
00287     {
00288         pFanin = Abc_ObjFanin0(pObj);
00289         if ( pFanin->pCopy->pCopy )
00290             pNodeNew = Abc_ObjNotCond(pFanin->pCopy->pCopy, Abc_ObjFaninC0(pObj));
00291         else
00292             pNodeNew = Abc_ObjNotCond(pFanin->pCopy, Abc_ObjFaninC0(pObj));
00293         Abc_ObjAddFanin( pObj->pCopy, pNodeNew );
00294     }
00295 
00296     // fix the problem with complemented and duplicated CO edges
00297     Abc_NtkLogicMakeSimpleCos( pNtkNew, 0 );
00298     // duplicate the EXDC Ntk
00299     if ( pNtk->pExdc )
00300     {
00301         if ( Abc_NtkIsStrash(pNtk->pExdc) )
00302             pNtkNew->pExdc = Abc_NtkAigToLogicSop( pNtk->pExdc );
00303         else
00304             pNtkNew->pExdc = Abc_NtkDup( pNtk->pExdc );
00305     }
00306     if ( !Abc_NtkCheck( pNtkNew ) )
00307         fprintf( stdout, "Abc_NtkAigToLogicSop(): Network check has failed.\n" );
00308     return pNtkNew;
00309 }

Abc_Ntk_t * Abc_NtkAigToLogicSopBench ( Abc_Ntk_t *  pNtk  )  [static]

Function*************************************************************

Synopsis [Converts the AIG into the logic network with SOPs for bench writing.]

Description [This procedure does not copy the choices.]

SideEffects []

SeeAlso []

Definition at line 322 of file abcNetlist.c.

00323 {
00324     Abc_Ntk_t * pNtkNew; 
00325     Abc_Obj_t * pObj, * pFanin;
00326     Vec_Ptr_t * vNodes;
00327     int i, k;
00328     assert( Abc_NtkIsStrash(pNtk) );
00329     if ( Abc_NtkGetChoiceNum(pNtk) )
00330         printf( "Warning: Choice nodes are skipped.\n" );
00331     // start the network
00332     pNtkNew = Abc_NtkStartFrom( pNtk, ABC_NTK_LOGIC, ABC_FUNC_SOP );
00333     // collect the nodes to be used (marks all nodes with current TravId)
00334     vNodes = Abc_NtkDfs( pNtk, 0 );
00335     // create inverters for the CI and remember them
00336     pObj = Abc_AigConst1(pNtk);
00337     if ( Abc_AigNodeHasComplFanoutEdgeTrav(pObj) )
00338     {
00339         pObj->pCopy = Abc_NtkCreateNodeConst1(pNtkNew);
00340         pObj->pCopy->pCopy = Abc_NtkCreateNodeInv( pNtkNew, pObj->pCopy );
00341     }
00342     Abc_NtkForEachCi( pNtk, pObj, i )
00343         if ( Abc_AigNodeHasComplFanoutEdgeTrav(pObj) )
00344             pObj->pCopy->pCopy = Abc_NtkCreateNodeInv( pNtkNew, pObj->pCopy );
00345     // duplicate the nodes, create node functions, and inverters
00346     Vec_PtrForEachEntry( vNodes, pObj, i )
00347     {
00348         Abc_NtkDupObj( pNtkNew, pObj, 0 );
00349         pObj->pCopy->pData = Abc_SopCreateAnd( pNtkNew->pManFunc, 2, NULL );
00350         if ( Abc_AigNodeHasComplFanoutEdgeTrav(pObj) )
00351             pObj->pCopy->pCopy = Abc_NtkCreateNodeInv( pNtkNew, pObj->pCopy );
00352     }
00353     // connect the objects
00354     Vec_PtrForEachEntry( vNodes, pObj, i )
00355         Abc_ObjForEachFanin( pObj, pFanin, k )
00356         {
00357             if ( Abc_ObjFaninC( pObj, k ) )
00358                 Abc_ObjAddFanin( pObj->pCopy, pFanin->pCopy->pCopy );
00359             else
00360                 Abc_ObjAddFanin( pObj->pCopy, pFanin->pCopy );
00361         }
00362     Vec_PtrFree( vNodes );
00363     // connect the COs
00364     Abc_NtkForEachCo( pNtk, pObj, i )
00365     {
00366         pFanin = Abc_ObjFanin0(pObj);
00367         if ( Abc_ObjFaninC0( pObj ) )
00368             Abc_ObjAddFanin( pObj->pCopy, pFanin->pCopy->pCopy );
00369         else
00370             Abc_ObjAddFanin( pObj->pCopy, pFanin->pCopy );
00371     }
00372     // fix the problem with complemented and duplicated CO edges
00373     Abc_NtkLogicMakeSimpleCos( pNtkNew, 0 );
00374     // duplicate the EXDC Ntk
00375     if ( pNtk->pExdc )
00376         printf( "Warning: The EXDc network is skipped.\n" );
00377     if ( !Abc_NtkCheck( pNtkNew ) )
00378         fprintf( stdout, "Abc_NtkAigToLogicSopBench(): Network check has failed.\n" );
00379     return pNtkNew;
00380 }

Abc_Ntk_t * Abc_NtkLogicToNetlist ( Abc_Ntk_t *  pNtk  )  [static]

Function*************************************************************

Synopsis [Transform the logic network into a netlist.]

Description [The logic network given to this procedure should have exactly the same structure as the resulting netlist. The COs can only point to CIs if they have identical names. Otherwise, they should have a node between them, even if this node is inverter or buffer.]

SideEffects []

SeeAlso []

Definition at line 143 of file abcNetlist.c.

00144 {
00145     Abc_Ntk_t * pNtkNew; 
00146     Abc_Obj_t * pObj, * pNet, * pDriver, * pFanin;
00147     int i, k;
00148 
00149     assert( Abc_NtkIsLogic(pNtk) );
00150 
00151     // remove dangling nodes
00152     Abc_NtkCleanup( pNtk, 0 );
00153 
00154     // make sure the CO names are unique
00155     Abc_NtkCheckUniqueCiNames( pNtk );
00156     Abc_NtkCheckUniqueCoNames( pNtk );
00157     Abc_NtkCheckUniqueCioNames( pNtk );
00158 
00159 //    assert( Abc_NtkLogicHasSimpleCos(pNtk) );
00160     if ( !Abc_NtkLogicHasSimpleCos(pNtk) )
00161     {
00162         printf( "Abc_NtkLogicToNetlist() warning: The network is converted to have simple COs.\n" );
00163         Abc_NtkLogicMakeSimpleCos( pNtk, 0 );
00164     }
00165 
00166     // start the netlist by creating PI/PO/Latch objects
00167     pNtkNew = Abc_NtkStartFrom( pNtk, ABC_NTK_NETLIST, pNtk->ntkFunc );
00168     // create the CI nets and remember them in the new CI nodes
00169     Abc_NtkForEachCi( pNtk, pObj, i )
00170     {
00171         pNet = Abc_NtkFindOrCreateNet( pNtkNew, Abc_ObjName(pObj) );
00172         Abc_ObjAddFanin( pNet, pObj->pCopy );
00173         pObj->pCopy->pCopy = pNet;
00174     }
00175     // duplicate all nodes
00176     Abc_NtkForEachNode( pNtk, pObj, i )
00177         Abc_NtkDupObj(pNtkNew, pObj, 0);
00178     // first add the nets to the CO drivers
00179     Abc_NtkForEachCo( pNtk, pObj, i )
00180     {
00181         pDriver = Abc_ObjFanin0(pObj);
00182         if ( Abc_ObjIsCi(pDriver) )
00183         {
00184             assert( !strcmp( Abc_ObjName(pDriver), Abc_ObjName(pObj) ) );
00185             Abc_ObjAddFanin( pObj->pCopy, pDriver->pCopy->pCopy );
00186             continue;
00187         }
00188         assert( Abc_ObjIsNode(pDriver) );
00189         // if the CO driver has no net, create it
00190         if ( pDriver->pCopy->pCopy == NULL )
00191         {
00192             // create the CO net and connect it to CO
00193             pNet = Abc_NtkFindOrCreateNet( pNtkNew, Abc_ObjName(pObj) );
00194             Abc_ObjAddFanin( pObj->pCopy, pNet );
00195             // connect the CO net to the new driver and remember it in the new driver
00196             Abc_ObjAddFanin( pNet, pDriver->pCopy );
00197             pDriver->pCopy->pCopy = pNet;
00198         }
00199         else
00200         {
00201             assert( !strcmp( Abc_ObjName(pDriver->pCopy->pCopy), Abc_ObjName(pObj) ) );
00202             Abc_ObjAddFanin( pObj->pCopy, pDriver->pCopy->pCopy );
00203         }
00204     }
00205     // create the missing nets
00206     Abc_NtkForEachNode( pNtk, pObj, i )
00207     {
00208         if ( pObj->pCopy->pCopy ) // the net of the new object is already created
00209             continue;
00210         // create the new net
00211         pNet = Abc_NtkFindOrCreateNet( pNtkNew, Abc_ObjName(pObj) ); // here we create ridiculous names net line "n48", where 48 is the ID of the node
00212         Abc_ObjAddFanin( pNet, pObj->pCopy );
00213         pObj->pCopy->pCopy = pNet;
00214     }
00215     // connect nodes to the fanins nets
00216     Abc_NtkForEachNode( pNtk, pObj, i )
00217         Abc_ObjForEachFanin( pObj, pFanin, k )
00218             Abc_ObjAddFanin( pObj->pCopy, pFanin->pCopy->pCopy );
00219     // duplicate EXDC 
00220     if ( pNtk->pExdc )
00221         pNtkNew->pExdc = Abc_NtkToNetlist( pNtk->pExdc );
00222     if ( !Abc_NtkCheck( pNtkNew ) )
00223         fprintf( stdout, "Abc_NtkLogicToNetlist(): Network check has failed.\n" );
00224     return pNtkNew;
00225 }

Abc_Ntk_t* Abc_NtkToLogic ( Abc_Ntk_t *  pNtk  ) 

FUNCTION DEFINITIONS ///Function*************************************************************

Synopsis [Transform the netlist into a logic network.]

Description []

SideEffects []

SeeAlso []

Definition at line 48 of file abcNetlist.c.

00049 {
00050     Abc_Ntk_t * pNtkNew; 
00051     Abc_Obj_t * pObj, * pFanin;
00052     int i, k;
00053     // consider the case of the AIG
00054     if ( Abc_NtkIsStrash(pNtk) )
00055         return Abc_NtkAigToLogicSop( pNtk );
00056     assert( Abc_NtkIsNetlist(pNtk) );
00057     // consider simple case when there is hierarchy
00058 //    assert( pNtk->pDesign == NULL );
00059     assert( Abc_NtkWhiteboxNum(pNtk) == 0 );
00060     assert( Abc_NtkBlackboxNum(pNtk) == 0 );
00061     // start the network
00062     pNtkNew = Abc_NtkStartFrom( pNtk, ABC_NTK_LOGIC, pNtk->ntkFunc );
00063     // duplicate the nodes 
00064     Abc_NtkForEachNode( pNtk, pObj, i )
00065         Abc_NtkDupObj(pNtkNew, pObj, 0);
00066     // reconnect the internal nodes in the new network
00067     Abc_NtkForEachNode( pNtk, pObj, i )
00068         Abc_ObjForEachFanin( pObj, pFanin, k )
00069             Abc_ObjAddFanin( pObj->pCopy, Abc_ObjFanin0(pFanin)->pCopy );
00070     // collect the CO nodes
00071     Abc_NtkFinalize( pNtk, pNtkNew );
00072     // fix the problem with CO pointing directly to CIs
00073     Abc_NtkLogicMakeSimpleCos( pNtkNew, 0 );
00074     // duplicate EXDC 
00075     if ( pNtk->pExdc )
00076         pNtkNew->pExdc = Abc_NtkToLogic( pNtk->pExdc );
00077     if ( !Abc_NtkCheck( pNtkNew ) )
00078         fprintf( stdout, "Abc_NtkToLogic(): Network check has failed.\n" );
00079     return pNtkNew;
00080 }

Abc_Ntk_t* Abc_NtkToNetlist ( Abc_Ntk_t *  pNtk  ) 

Function*************************************************************

Synopsis [Transform the logic network into a netlist.]

Description []

SideEffects []

SeeAlso []

Definition at line 93 of file abcNetlist.c.

00094 {
00095     Abc_Ntk_t * pNtkNew, * pNtkTemp; 
00096     assert( Abc_NtkIsLogic(pNtk) || Abc_NtkIsStrash(pNtk) );
00097     if ( Abc_NtkIsStrash(pNtk) )
00098     {
00099         pNtkTemp = Abc_NtkAigToLogicSop(pNtk);
00100         pNtkNew = Abc_NtkLogicToNetlist( pNtkTemp );
00101         Abc_NtkDelete( pNtkTemp );
00102         return pNtkNew;
00103     }
00104     return Abc_NtkLogicToNetlist( pNtk );
00105 }

Abc_Ntk_t* Abc_NtkToNetlistBench ( Abc_Ntk_t *  pNtk  ) 

Function*************************************************************

Synopsis [Converts the AIG into the netlist.]

Description [This procedure does not copy the choices.]

SideEffects []

SeeAlso []

Definition at line 118 of file abcNetlist.c.

00119 {
00120     Abc_Ntk_t * pNtkNew, * pNtkTemp; 
00121     assert( Abc_NtkIsStrash(pNtk) );
00122     pNtkTemp = Abc_NtkAigToLogicSopBench( pNtk );
00123     pNtkNew = Abc_NtkLogicToNetlist( pNtkTemp );
00124     Abc_NtkDelete( pNtkTemp );
00125     return pNtkNew;
00126 }

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