Amin Ghasemazar

I am a Ph.D. candidate at the University of British Columbia (UBC) advised by Prof. Mieszko Lis and Prashant Nair. My research mainly focuses on (1) hardware acceleration for training sparse neural networks. (2) in-hardware compression of on-chip data; (3) Approximate Computing.
I have published papers in top-tier venues including ASPLOS, MICRO and DATE.
[Curriculum Vitae]. (Updated October 2020)
[Google Scholar]
aming@ece.ubc.ca

Amin Ghasemazar

Projects

Cache Compression Techniques
Amin Ghasemazar Cache Compression
    • Developed a novel cache compression scheme based on hardware-level on-line cacheline clustering. The online clustering mechanism leverages the locality-sensitive hashing. Work published in ASPLOS 2020.
    • Proposed 2DCC compression scheme that leverages both intra-block compression or inter-block (across) cachelines. Work published in DATE 2020.

  • AI / Domain-Specific Accelerators
    Amin Ghasemazar Accelerator
    • Designed a hardware accelerator for training sparse neural networks in a group of 3. Identified challenges including load imbalance and dataflow and proposed an accelerator architecture to enable sparse training from scratch using a hardware-friendly sparse training algorithm. Work accepted in MICRO 2020.
    • Proposed a new pipelined MIMO complex floating point ALU and implemented it in RTL. Complex. In an FPGA implementation, the design resulted in up to 12× speed up over SOTA designs. Work published in VLSID 2014.

  • ML / Computer Vision
    Amin Ghasemazar Machine Learning
    • Designed and developed an open-source waste management and traffic monitoring system on Azure cloud in a group of 5. The project uses a combination of local object detection algorithems and cloud APIs to perform it's tasks. The project won the 3rd place in Microsoft Encode Hackathon . [GitHub Repo] [presentation] [CloudVision.ml]
    • Implemented a neural network training management infrastructure for custom hyperparameter tuning and multi-GPU training on clusters with job management system. Having this infrastructure, we were able to train hundreds of different combination of model parameters with just a few lines of code. It supports custom learning rate schedules, models, early termination of bad model configuration etc. [GitHub Repo]
    • Developed an on-premise indoor object detection and text extraction pipeline leveraging the state of the art models. The project will be to be used to estimate the property value from its images. [GitHub Repo]
    • Developed in the cloud object detection of the live traffic cameras in Vancouver to gather traffic data. The app can later be used to detect anomalies and accidents. [GitHub Page]

  • Knowledge Graph
    Amin Ghasemazar Knowledge Graph
    • Designed Implemented a software system for classifying the research papers and storing them inside a graph database. The framework helped ML researchers to execute complex queries on paper-paper and author-paper relation of arXiv ML papers and made the literature review considerably faster.

  • Approximate Computing
    Amin Ghasemazar Approximate Computing
    • Developed and implemented an accurate method for estimating errors in approximate circuits. Inputs are modelled as Gaussian mixtures and analytically propagated through circuit elements. Error estimates (MSE) are 2 orders of magnitude closer to actual simulations compared to prior approaches. Work published in DATE 2017.
    • Developed an automated framework to replace functional modules in Verilog RTL descriptions and evaluate the overall design impact. The tool leverages Yosys, VTR, and Design Compiler, and is used to study module replacements with approximate versions.

  • Embedded Systems
    Amin Ghasemazar Embedded Systems
    • Developed smart home software and IoT devices using embedded Linux machines. Designed an IP (WIFI) gateway for devices connected via KNX standard and implemented a basic webapp to control actuators and devices, 2014.
    • Designed and developed a configurable high-power wireless mesh network using embedded Linux machines. The system was developed to be used inside facilities with specific security requirements needing visibility over their security monitoring devices, routers, etc. IUST, 2012.
    • Designed and build competition robots with low power microcontrollers, 2006.

  • Network-on-Chip
    Amin Ghasemazar Network on Chip
    • Co-designed the first heterogeneous network-on-chip architecture with both traditional processing elements and small reconfigurable FPGAs as processing cores. The design resulted in significant improvement over the state-of-the-art research in terms of power and application execution time (4× faster). Work published in DTIS 2015.
    • Proposed A hybrid algorithm to take advantages of having a reconfigurable NoC and mapping time consuming tasks to FPGAs as reconfigurable PEs.
  • Professional Experiences

    Internship
    • [2017] MediaTek Inc. USA – Boston, MA.

        Researched and simulated low power mechanisms through low-precision computing units.

    • [2011] Nikoodasht Co. – Tehran.

        Simulated an industrial 3-phase switching power supply in software.


    • Research Assistantship
      • [2015-2020] University of British Columbia – Vancouver, CA.

          Developed data compression mechanisms to increase effective cache capacity. Researched on approximate computing for improved system performance and energy. Working on various deep neural network acceleration methods through data compression and sparse training.

      • [2012-2015] University of Tehran – Tehran.

          Leveraged approximate computing techniques for improving overall system performance..


      Creative Destruction Lab (CDL) / Consultation
      • [2019-2020] CDL-West. – Vancouver, CA.

          Support CDL-West companies with market research, competitive analysis, customer development and their technical needs in the CDL’s educational program.

      • [2018-2020] Consultation – Vancouver, CA.

          Collaborated with early stage startups on software projects leveraging machine learning, knowledge graphs and natural language processing (nlp).

    Publications

    Amin Ghasemazar Accelerator
  • D. Yang, A. Ghasemazar, X. Ren, M. Golub, G. Lemieux, M. Lis, "Procrustes: a Dataflow and Accelerator for Sparse Deep Neural Network Training”, In The International Symposium on Microarchitecture (MICRO) ,2020.

  • Amin Ghasemazar Cache Compression
  • A. Ghasemazar, P. Nair, M. Lis, “Thesaurus: Efficient Cache Compression via Dynamic Clustering,” In The Int’l Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS) , 2020.
    [PDF] [paper link] [presentation] [video]

  • Amin Ghasemazar Cache Compression
  • A. Ghasemazar, M. Ewais, P. Nair, M. Lis, “2DCC: Cache Compression in Two Dimensions,” In Design, Automation and Test in Europe Conference and Exhibition (DATE) , 2020.
    [PDF] [presentation]

  • Amin Ghasemazar Approximate Computing
  • A. Ghasemazar, M. Lis, “Gaussian Mixture Error Estimation for Approximate Circuits,” In Design, Automation and Test in Europe Conference and Exhibition (DATE) , 2017.
    [PDF] [paper link] [presentation]

  • Amin Ghasemazar Network On Chip
  • A. Ghasemazar, M. Goli, Zain Navabi, “Application-Specific Power-Aware Mapping for Reconfigurable NoC Architectures,” In proceedings of the 10th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS) , 2015.
    [paper link]

  • Amin Ghasemazar Approximate Computing
  • M. Kamal, A. Ghasemazar, A. Afzali-Kusha, M. Pedram, "Improving efficiency of extensible processors by using approximate custom instructions," Design, Automation and Test in Europe Conference and Exhibition (DATE) , 2014.
    [paper link]

  • Amin Ghasemazar Accelerator
  • A. Ghasemazar, M. Goli, A. Afzali-kusha, "Embedded Complex Floating Point Hardware Accelerator," Int’l Conference on VLSI Design and Embedded Systems (VLSID) , 2014.
    [paper link]


  • Amin Ghasemazar Approximate Computing
  • A. Ghasemazar, M.Ewais, M. Lis, "Decoupling Approximation and Cache Compression," The 2020 Workshop on Approximate Computing Across the Stack (WAX), ASPLOS workshop, , 2020.
    [PDF] [paper link]

  • Amin Ghasemazar Cache Compression
  • A. Ghasemazar, M.Ewais, P.Nair, M. Lis, "Cache Compression in Two Dimensions," 2019 IEEE 37th International Conference on Computer Design (ICCD), , 2019.
    [PDF] [poster list]

  • Teaching

    Teaching and Learning Enhancement Fund project (TLEF)

    We proposed to redesign Digital Systems Design course with ~450 student/year, to follow test-driven design methodologies currently used in the industry. For the 2019/2020 year, we have received $50,000 funding to develop the infrastructure. details ...



    Teaching Assistantship
    • [2017-2019] CPEN 311 - Digital Systems Design (4x TA)

        Students learn Advanced combinational and sequential electronic system design, hardware specification, modeling, and simulation using SystemVerilog, Design with programmable logic including FPGA's, pipelining, applications include complex state machines, microcontrollers, arithmetic circuits, and interface units. Students implement their work using Quartus software on DE1-SoC FPGA Board.

    • [2015-2016] CPEN 211 - Introduction to Microcomputers (2× TA)

        Students learn basics of digital systems and microcomputers including combinational and sequential circuits, organization and operation of microcomputers, memory addressing modes, instruction sets and NIOS II, and machine and assembly language programming. Students implement their work using Quartus software on DE2 FPGA boards.

    • [2018-2019] IDSD 101 - Introduction to Digital Systems Design (2x TA)

        Students learn basics of combinational and sequential electronic systems, hardware specification, modeling, and simulation using SystemVerilog, Design with programmable logic including FPGA's. Students implement their work using Quartus software on DE0-Nano FPGA Board.

    • [2019] ELEC 391 - Electrical Engineering Design Studio II

        Students learn basics of project management, design principles and practices, and testing and evaluation to be able to complete a final project. They also learn technical aspects such as electronics, communications, control systems, and motors and machines.

    • [2015-2020] CPEN/ELEC 491 - Capstone Design Projects (4x TA)
    • [2014] Embedded Systems Design

    • [2013] Advanced Computer Architecture

    • [2010] Computer Architecture