Cyber Home of Mehdi Kazemi-Nia

          Hello,

          I am a Ph.D. Candidate in Electrical Engineering at University of British Columbia (UBC), Vancouver, Canada. My main areas of interest are high performance analog and digital circuit design, self-timed circuits, and low-power VLSI design.

          Web Pages

          Here are links to some web pages.

          • Iranian students at UBC Home Page

            • Recent Publications

            • "VLSI Design of a Scalable ATM Switch," Submitted to IEEE ATM '97 Workshop, May 1997, Lisboa, Portugal 1997.

            • "Balanced Multiport Buffer Design in Silicon," Proc. of IEEE ATM '96 Workshop, , pp. HW.1-6, San Francisco, CA, Aug. 1996.

            • "VLSI Implementation of Highly-Optimized Scalable ATM Switches," Proc. of 18th Symp. on Commu., pp. 101-104, Kingston, Canada, June 1996.

            • "VLSI Support for Intelligent Buffer Management in High-Speed Packet-Switched Networks," Ph.D. Thesis Proposal, Elec. Eng. Dept., UBC, Vancouver, Canada, March 1996.

            • "Design of a Class 1 QTAG Monitor for off-chip Iddq Testing," IEEE Intl. Workshop on IDDQ Testing, Washington, DC, Oct. 1995.

            • "Analog and Hybrid (VLSI) Implementations of Feedforward Neural Networks," M.A.Sc. Thesis, Elec. Eng. Dept., U. of Windsor, Windsor, Canada, Dec. 1994.

            • "New Analytic Functions with Wavelet Applications," Proc. of Symp. on Intelligent Systems in Commu. & Power (SISCAP `94), Puerto Rico, Feb. 1994.

              • Contact Information

                Address:

                Mehdi Kazemi-Nia
                UBC - Elec. Eng. Dept.
                2356 Main mall
                Vancouver, BC
                Canada V6T 1Z4
                Tel: (604) 221-9293
                Fax: (604) 822-5949
                Email: mehdik@ee.ubc.ca