VPR-6.0
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00001 /** 00002 * @file 00003 * 00004 * Data types describing the logic (technology-mapped) models that the architecture can implement. 00005 * Logic models include LUT (.names), flipflop (.latch), inpad, outpad, memory slice, etc. 00006 * 00007 * Date: February 19, 2009 00008 * Authors: Jason Luu and Kenneth Kent 00009 */ 00010 00011 #ifndef LOGIC_TYPES_H 00012 #define LOGIC_TYPES_H 00013 00014 #include "util.h" 00015 00016 /** 00017 * Logic model data types 00018 * A logic model is described by its I/O ports and function name 00019 */ 00020 enum PORTS {IN_PORT, OUT_PORT, INOUT_PORT, ERR_PORT}; 00021 typedef struct s_model_ports 00022 { 00023 enum PORTS dir; /**< port direction */ 00024 char *name; /**< name of this port */ 00025 int size; /**< maximum number of pins */ 00026 int min_size; /**< minimum number of pins */ 00027 boolean is_clock; /**< clock? */ 00028 struct s_model_ports *next; /**< next port */ 00029 00030 int index; /**< indexing for array look-up */ 00031 } t_model_ports; 00032 00033 typedef struct s_model 00034 { 00035 char *name; /**< name of this logic model */ 00036 t_model_ports *inputs; /**< linked list of input/clock ports */ 00037 t_model_ports *outputs; /**< linked list of output ports */ 00038 void *instances; 00039 int used; 00040 struct s_linked_vptr *pb_types; /**< Physical block types that implement this model */ 00041 struct s_model *next; /**< next model (linked list) */ 00042 00043 int index; 00044 } t_model; 00045 00046 #endif 00047