abc70930: src/opt/sim/simUtils.c Source File

00001 
00021 #include "abc.h"
00022 #include "sim.h"
00023 
00027  
00028 static int bit_count[256] = {
00029   0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4,1,2,2,3,2,3,3,4,2,3,3,4,3,4,4,5,
00030   1,2,2,3,2,3,3,4,2,3,3,4,3,4,4,5,2,3,3,4,3,4,4,5,3,4,4,5,4,5,5,6,
00031   1,2,2,3,2,3,3,4,2,3,3,4,3,4,4,5,2,3,3,4,3,4,4,5,3,4,4,5,4,5,5,6,
00032   2,3,3,4,3,4,4,5,3,4,4,5,4,5,5,6,3,4,4,5,4,5,5,6,4,5,5,6,5,6,6,7,
00033   1,2,2,3,2,3,3,4,2,3,3,4,3,4,4,5,2,3,3,4,3,4,4,5,3,4,4,5,4,5,5,6,
00034   2,3,3,4,3,4,4,5,3,4,4,5,4,5,5,6,3,4,4,5,4,5,5,6,4,5,5,6,5,6,6,7,
00035   2,3,3,4,3,4,4,5,3,4,4,5,4,5,5,6,3,4,4,5,4,5,5,6,4,5,5,6,5,6,6,7,
00036   3,4,4,5,4,5,5,6,4,5,5,6,5,6,6,7,4,5,5,6,5,6,6,7,5,6,6,7,6,7,7,8
00037 };
00038 
00042 
00054 Vec_Ptr_t * Sim_UtilInfoAlloc( int nSize, int nWords, bool fClean )
00055 {
00056     Vec_Ptr_t * vInfo;
00057     int i;
00058     assert( nSize > 0 && nWords > 0 );
00059     vInfo = Vec_PtrAlloc( nSize );
00060     vInfo->pArray[0] = ALLOC( unsigned, nSize * nWords );
00061     if ( fClean )
00062         memset( vInfo->pArray[0], 0, sizeof(unsigned) * nSize * nWords );
00063     for ( i = 1; i < nSize; i++ )
00064         vInfo->pArray[i] = ((unsigned *)vInfo->pArray[i-1]) + nWords;
00065     vInfo->nSize = nSize;
00066     return vInfo;
00067 }
00068 
00080 void Sim_UtilInfoFree( Vec_Ptr_t * p )
00081 {
00082     free( p->pArray[0] );
00083     Vec_PtrFree( p );
00084 }
00085 
00097 void Sim_UtilInfoAdd( unsigned * pInfo1, unsigned * pInfo2, int nWords )
00098 {
00099     int w;
00100     for ( w = 0; w < nWords; w++ )
00101         pInfo1[w] |= pInfo2[w];
00102 }
00103 
00115 void Sim_UtilInfoDetectDiffs( unsigned * pInfo1, unsigned * pInfo2, int nWords, Vec_Int_t * vDiffs )
00116 {
00117     int w, b;
00118     unsigned uMask;
00119     vDiffs->nSize = 0;
00120     for ( w = 0; w < nWords; w++ )
00121         if ( uMask = (pInfo2[w] ^ pInfo1[w]) )
00122             for ( b = 0; b < 32; b++ )
00123                 if ( uMask & (1 << b) )
00124                     Vec_IntPush( vDiffs, 32*w + b );
00125 }
00126 
00138 void Sim_UtilInfoDetectNews( unsigned * pInfo1, unsigned * pInfo2, int nWords, Vec_Int_t * vDiffs )
00139 {
00140     int w, b;
00141     unsigned uMask;
00142     vDiffs->nSize = 0;
00143     for ( w = 0; w < nWords; w++ )
00144         if ( uMask = (pInfo2[w] & ~pInfo1[w]) )
00145             for ( b = 0; b < 32; b++ )
00146                 if ( uMask & (1 << b) )
00147                     Vec_IntPush( vDiffs, 32*w + b );
00148 }
00149 
00161 void Sim_UtilInfoFlip( Sim_Man_t * p, Abc_Obj_t * pNode )
00162 {
00163     unsigned * pSimInfo1, * pSimInfo2;
00164     int k;
00165     pSimInfo1 = p->vSim0->pArray[pNode->Id];
00166     pSimInfo2 = p->vSim1->pArray[pNode->Id];
00167     for ( k = 0; k < p->nSimWords; k++ )
00168         pSimInfo2[k] = ~pSimInfo1[k];
00169 }
00170 
00182 bool Sim_UtilInfoCompare( Sim_Man_t * p, Abc_Obj_t * pNode )
00183 {
00184     unsigned * pSimInfo1, * pSimInfo2;
00185     int k;
00186     pSimInfo1 = p->vSim0->pArray[pNode->Id];
00187     pSimInfo2 = p->vSim1->pArray[pNode->Id];
00188     for ( k = 0; k < p->nSimWords; k++ )
00189         if ( pSimInfo2[k] != pSimInfo1[k] )
00190             return 0;
00191     return 1;
00192 }
00193 
00205 void Sim_UtilSimulate( Sim_Man_t * p, bool fType )
00206 {
00207     Abc_Obj_t * pNode;
00208     int i;
00209     // simulate the internal nodes
00210     Abc_NtkForEachNode( p->pNtk, pNode, i )
00211         Sim_UtilSimulateNode( p, pNode, fType, fType, fType );
00212     // assign simulation info of the CO nodes
00213     Abc_NtkForEachCo( p->pNtk, pNode, i )
00214         Sim_UtilSimulateNode( p, pNode, fType, fType, fType );
00215 }
00216 
00228 void Sim_UtilSimulateNode( Sim_Man_t * p, Abc_Obj_t * pNode, bool fType, bool fType1, bool fType2 )
00229 {
00230     unsigned * pSimmNode, * pSimmNode1, * pSimmNode2;
00231     int k, fComp1, fComp2;
00232     // simulate the internal nodes
00233     if ( Abc_ObjIsNode(pNode) )
00234     {
00235         if ( fType )
00236             pSimmNode  = p->vSim1->pArray[ pNode->Id ];
00237         else
00238             pSimmNode  = p->vSim0->pArray[ pNode->Id ];
00239 
00240         if ( fType1 )
00241             pSimmNode1 = p->vSim1->pArray[ Abc_ObjFaninId0(pNode) ];
00242         else
00243             pSimmNode1 = p->vSim0->pArray[ Abc_ObjFaninId0(pNode) ];
00244 
00245         if ( fType2 )
00246             pSimmNode2 = p->vSim1->pArray[ Abc_ObjFaninId1(pNode) ];
00247         else
00248             pSimmNode2 = p->vSim0->pArray[ Abc_ObjFaninId1(pNode) ];
00249 
00250         fComp1 = Abc_ObjFaninC0(pNode);
00251         fComp2 = Abc_ObjFaninC1(pNode);
00252         if ( fComp1 && fComp2 )
00253             for ( k = 0; k < p->nSimWords; k++ )
00254                 pSimmNode[k] = ~pSimmNode1[k] & ~pSimmNode2[k];
00255         else if ( fComp1 && !fComp2 )
00256             for ( k = 0; k < p->nSimWords; k++ )
00257                 pSimmNode[k] = ~pSimmNode1[k] &  pSimmNode2[k];
00258         else if ( !fComp1 && fComp2 )
00259             for ( k = 0; k < p->nSimWords; k++ )
00260                 pSimmNode[k] =  pSimmNode1[k] & ~pSimmNode2[k];
00261         else // if ( fComp1 && fComp2 )
00262             for ( k = 0; k < p->nSimWords; k++ )
00263                 pSimmNode[k] =  pSimmNode1[k] &  pSimmNode2[k];
00264     }
00265     else 
00266     {
00267         assert( Abc_ObjFaninNum(pNode) == 1 );
00268         if ( fType )
00269             pSimmNode  = p->vSim1->pArray[ pNode->Id ];
00270         else
00271             pSimmNode  = p->vSim0->pArray[ pNode->Id ];
00272 
00273         if ( fType1 )
00274             pSimmNode1 = p->vSim1->pArray[ Abc_ObjFaninId0(pNode) ];
00275         else
00276             pSimmNode1 = p->vSim0->pArray[ Abc_ObjFaninId0(pNode) ];
00277 
00278         fComp1 = Abc_ObjFaninC0(pNode);
00279         if ( fComp1 )
00280             for ( k = 0; k < p->nSimWords; k++ )
00281                 pSimmNode[k] = ~pSimmNode1[k];
00282         else 
00283             for ( k = 0; k < p->nSimWords; k++ )
00284                 pSimmNode[k] =  pSimmNode1[k];
00285     }
00286 }
00287 
00299 void Sim_UtilSimulateNodeOne( Abc_Obj_t * pNode, Vec_Ptr_t * vSimInfo, int nSimWords, int nOffset )
00300 {
00301     unsigned * pSimmNode, * pSimmNode1, * pSimmNode2;
00302     int k, fComp1, fComp2;
00303     // simulate the internal nodes
00304     assert( Abc_ObjIsNode(pNode) );
00305     pSimmNode  = Vec_PtrEntry(vSimInfo, pNode->Id);
00306     pSimmNode1 = Vec_PtrEntry(vSimInfo, Abc_ObjFaninId0(pNode));
00307     pSimmNode2 = Vec_PtrEntry(vSimInfo, Abc_ObjFaninId1(pNode));
00308     pSimmNode  += nOffset;
00309     pSimmNode1 += nOffset;
00310     pSimmNode2 += nOffset;
00311     fComp1 = Abc_ObjFaninC0(pNode);
00312     fComp2 = Abc_ObjFaninC1(pNode);
00313     if ( fComp1 && fComp2 )
00314         for ( k = 0; k < nSimWords; k++ )
00315             pSimmNode[k] = ~pSimmNode1[k] & ~pSimmNode2[k];
00316     else if ( fComp1 && !fComp2 )
00317         for ( k = 0; k < nSimWords; k++ )
00318             pSimmNode[k] = ~pSimmNode1[k] &  pSimmNode2[k];
00319     else if ( !fComp1 && fComp2 )
00320         for ( k = 0; k < nSimWords; k++ )
00321             pSimmNode[k] =  pSimmNode1[k] & ~pSimmNode2[k];
00322     else // if ( fComp1 && fComp2 )
00323         for ( k = 0; k < nSimWords; k++ )
00324             pSimmNode[k] =  pSimmNode1[k] &  pSimmNode2[k];
00325 }
00326 
00338 void Sim_UtilTransferNodeOne( Abc_Obj_t * pNode, Vec_Ptr_t * vSimInfo, int nSimWords, int nOffset, int fShift )
00339 {
00340     unsigned * pSimmNode, * pSimmNode1;
00341     int k, fComp1;
00342     // simulate the internal nodes
00343     assert( Abc_ObjIsCo(pNode) );
00344     pSimmNode  = Vec_PtrEntry(vSimInfo, pNode->Id);
00345     pSimmNode1 = Vec_PtrEntry(vSimInfo, Abc_ObjFaninId0(pNode));
00346     pSimmNode  += nOffset + (fShift > 0)*nSimWords;
00347     pSimmNode1 += nOffset;
00348     fComp1 = Abc_ObjFaninC0(pNode);
00349     if ( fComp1 )
00350         for ( k = 0; k < nSimWords; k++ )
00351             pSimmNode[k] = ~pSimmNode1[k];
00352     else 
00353         for ( k = 0; k < nSimWords; k++ )
00354             pSimmNode[k] =  pSimmNode1[k];
00355 }
00356 
00368 int Sim_UtilCountSuppSizes( Sim_Man_t * p, int fStruct )
00369 {
00370     Abc_Obj_t * pNode, * pNodeCi;
00371     int i, v, Counter;
00372     Counter = 0;
00373     if ( fStruct )
00374     {
00375         Abc_NtkForEachCo( p->pNtk, pNode, i )
00376             Abc_NtkForEachCi( p->pNtk, pNodeCi, v )
00377                 Counter += Sim_SuppStrHasVar( p->vSuppStr, pNode, v );
00378     }
00379     else
00380     {
00381         Abc_NtkForEachCo( p->pNtk, pNode, i )
00382             Abc_NtkForEachCi( p->pNtk, pNodeCi, v )
00383                 Counter += Sim_SuppFunHasVar( p->vSuppFun, i, v );
00384     }
00385     return Counter;
00386 }
00387 
00399 int Sim_UtilCountOnes( unsigned * pSimInfo, int nSimWords )
00400 {
00401     unsigned char * pBytes;
00402     int nOnes, nBytes, i;
00403     pBytes = (unsigned char *)pSimInfo;
00404     nBytes = 4 * nSimWords;
00405     nOnes  = 0;
00406     for ( i = 0; i < nBytes; i++ )
00407         nOnes += bit_count[ pBytes[i] ];
00408     return nOnes;    
00409 }
00410 
00422 Vec_Int_t * Sim_UtilCountOnesArray( Vec_Ptr_t * vInfo, int nSimWords )
00423 {
00424     Vec_Int_t * vCounters;
00425     unsigned * pSimInfo;
00426     int i;
00427     vCounters = Vec_IntStart( Vec_PtrSize(vInfo) );
00428     Vec_PtrForEachEntry( vInfo, pSimInfo, i )
00429         Vec_IntWriteEntry( vCounters, i, Sim_UtilCountOnes(pSimInfo, nSimWords) );
00430     return vCounters;
00431 }
00432 
00444 void Sim_UtilSetRandom( unsigned * pPatRand, int nSimWords )
00445 {
00446     int k;
00447     for ( k = 0; k < nSimWords; k++ )
00448         pPatRand[k] = SIM_RANDOM_UNSIGNED;
00449 }
00450 
00462 void Sim_UtilSetCompl( unsigned * pPatRand, int nSimWords )
00463 {
00464     int k;
00465     for ( k = 0; k < nSimWords; k++ )
00466         pPatRand[k] = ~pPatRand[k];
00467 }
00468 
00480 void Sim_UtilSetConst( unsigned * pPatRand, int nSimWords, int fConst1 )
00481 {
00482     int k;
00483     for ( k = 0; k < nSimWords; k++ )
00484         pPatRand[k] = 0;
00485     if ( fConst1 )
00486         Sim_UtilSetCompl( pPatRand, nSimWords );
00487 }
00488 
00500 int Sim_UtilInfoIsEqual( unsigned * pPats1, unsigned * pPats2, int nSimWords )
00501 {
00502     int k;
00503     for ( k = 0; k < nSimWords; k++ )
00504         if ( pPats1[k] != pPats2[k] )
00505             return 0;
00506     return 1;
00507 }
00508 
00520 int Sim_UtilInfoIsImp( unsigned * pPats1, unsigned * pPats2, int nSimWords )
00521 {
00522     int k;
00523     for ( k = 0; k < nSimWords; k++ )
00524         if ( pPats1[k] & ~pPats2[k] )
00525             return 0;
00526     return 1;
00527 }
00528 
00540 int Sim_UtilInfoIsClause( unsigned * pPats1, unsigned * pPats2, int nSimWords )
00541 {
00542     int k;
00543     for ( k = 0; k < nSimWords; k++ )
00544         if ( ~pPats1[k] & ~pPats2[k] )
00545             return 0;
00546     return 1;
00547 }
00548 
00560 int Sim_UtilCountAllPairs( Vec_Ptr_t * vSuppFun, int nSimWords, Vec_Int_t * vCounters )
00561 {
00562     unsigned * pSupp;
00563     int Counter, nOnes, nPairs, i;
00564     Counter = 0;
00565     Vec_PtrForEachEntry( vSuppFun, pSupp, i )
00566     {
00567         nOnes  = Sim_UtilCountOnes( pSupp, nSimWords );
00568         nPairs = nOnes * (nOnes - 1) / 2;
00569         Vec_IntWriteEntry( vCounters, i, nPairs );
00570         Counter += nPairs;
00571     }
00572     return Counter;
00573 }
00574 
00586 int Sim_UtilCountPairsOne( Extra_BitMat_t * pMat, Vec_Int_t * vSupport )
00587 {
00588     int i, k, Index1, Index2;
00589     int Counter = 0;
00590 //    int Counter2;
00591     Vec_IntForEachEntry( vSupport, i, Index1 )
00592     Vec_IntForEachEntryStart( vSupport, k, Index2, Index1+1 )
00593         Counter += Extra_BitMatrixLookup1( pMat, i, k );
00594 //    Counter2 = Extra_BitMatrixCountOnesUpper(pMat);
00595 //    assert( Counter == Counter2 );
00596     return Counter;
00597 }
00598 
00610 int Sim_UtilCountPairsOnePrint( Extra_BitMat_t * pMat, Vec_Int_t * vSupport )
00611 {
00612     int i, k, Index1, Index2;
00613     Vec_IntForEachEntry( vSupport, i, Index1 )
00614     Vec_IntForEachEntryStart( vSupport, k, Index2, Index1+1 )
00615         if ( Extra_BitMatrixLookup1( pMat, i, k ) )
00616             printf( "(%d,%d) ", i, k );
00617     return 0;
00618 }
00619 
00631 void Sim_UtilCountPairsAllPrint( Sym_Man_t * p )
00632 {
00633     int i, clk;
00634 clk = clock();
00635     for ( i = 0; i < p->nOutputs; i++ )
00636     {
00637         printf( "Output %2d :", i );
00638         Sim_UtilCountPairsOnePrint( Vec_PtrEntry(p->vMatrSymms, i), Vec_VecEntry(p->vSupports, i) );
00639         printf( "\n" );
00640     }
00641 p->timeCount += clock() - clk;
00642 }
00643 
00655 void Sim_UtilCountPairsAll( Sym_Man_t * p )
00656 {
00657     int nPairsTotal, nPairsSym, nPairsNonSym, i, clk;
00658 clk = clock();
00659     p->nPairsSymm    = 0;
00660     p->nPairsNonSymm = 0;
00661     for ( i = 0; i < p->nOutputs; i++ )
00662     {
00663         nPairsTotal  = Vec_IntEntry(p->vPairsTotal, i);
00664         nPairsSym    = Vec_IntEntry(p->vPairsSym,   i);
00665         nPairsNonSym = Vec_IntEntry(p->vPairsNonSym,i);
00666         assert( nPairsTotal >= nPairsSym + nPairsNonSym ); 
00667         if ( nPairsTotal == nPairsSym + nPairsNonSym )
00668         {
00669             p->nPairsSymm    += nPairsSym;
00670             p->nPairsNonSymm += nPairsNonSym;
00671             continue;
00672         }
00673         nPairsSym    = Sim_UtilCountPairsOne( Vec_PtrEntry(p->vMatrSymms,   i), Vec_VecEntry(p->vSupports, i) );
00674         nPairsNonSym = Sim_UtilCountPairsOne( Vec_PtrEntry(p->vMatrNonSymms,i), Vec_VecEntry(p->vSupports, i) );
00675         assert( nPairsTotal >= nPairsSym + nPairsNonSym ); 
00676         Vec_IntWriteEntry( p->vPairsSym,    i, nPairsSym );
00677         Vec_IntWriteEntry( p->vPairsNonSym, i, nPairsNonSym );
00678         p->nPairsSymm    += nPairsSym;
00679         p->nPairsNonSymm += nPairsNonSym;
00680 //        printf( "%d ", nPairsTotal - nPairsSym - nPairsNonSym );
00681     }
00682 //printf( "\n" );
00683     p->nPairsRem = p->nPairsTotal-p->nPairsSymm-p->nPairsNonSymm;
00684 p->timeCount += clock() - clk;
00685 }
00686 
00698 int Sim_UtilMatrsAreDisjoint( Sym_Man_t * p )
00699 {
00700     int i;
00701     for ( i = 0; i < p->nOutputs; i++ )
00702         if ( !Extra_BitMatrixIsDisjoint( Vec_PtrEntry(p->vMatrSymms,i), Vec_PtrEntry(p->vMatrNonSymms,i) ) )
00703             return 0;
00704     return 1;
00705 }
00706 
00710 
00711