Re: address decoders

Eric Young (eyoung@interchange.ubc.ca) Thu, 7 Dec 2000 13:24:49 -0800 (PST) 

Date: Thu, 7 Dec 2000 13:24:49 -0800 (PST)
From: Eric Young <eyoung@interchange.ubc.ca>
Subject: Re: address decoders



The two missing bits are the two LSB, which will always be active, no
matter what device (RAM, I/O, etc.) is being used.  The I/O was 2 bits
(the smallest of any of the devices), and the CPU 20, so 20-2=18

Eric

On Thu, 7 Dec 2000, Azuma Hashimoto wrote:

> Hi.  I have a question about exercise 7 from the microcomputer architecture 
> handout.  In it we are supposed to draw out a diagram for a microcomputer.  
> But when you did it in class the address decoder only gets an 18 bit 
> address?
> Why is that?  Is it because the I/O chip could always potentially be active 
> with any other activity?  So that when you have the EPROM and I/O active at 
> the same time the address decoder needs
> 16(for EPROM) + 2(for I/O) = 18 bits?????
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