Signal Conditioning Borad

Tony Lin (ytony@interchange.ubc.ca) Wed, 6 Dec 2000 00:14:21 -0800 

From: "Tony Lin" <ytony@interchange.ubc.ca>
Subject: Signal Conditioning Borad
Date: Wed, 6 Dec 2000 00:14:21 -0800




Hi,

I have a question regarding the liquid level sensor ICs that is contained in the signal conditioning board in Lab3. 
In the lab, it indicates that the logic level is inverted on the interface card so that the computer receives a logic 1 instead of
0 when there is no liquid present. I was wondering is this true for all the signal conditioning board or it is just for this case?
Furthermore, if a similar question is asked in the final, do we still inverted the logic as we did in the lab?

Thanks

Tony L.