Ed Casas (edc@ece.ubc.ca) Mon, 27 Nov 2000 18:51:12 -0800
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Date: Mon, 27 Nov 2000 18:51:12 -0800 From: Ed Casas <edc@ece.ubc.ca> Subject: Re: Assignment 4> > > Does anyone know whether there is an output enable (OE) for the > > > memory chips in question 1? > > > > No OE*. The outputs are tri-stated when CS* is not asserted. > > If this is the case, then why is there a RD* output from the CPU? > What is RD* used for? In this design it's not required. -- Ed Casas edc@ece.ubc.ca http://casas.ece.ubc.ca +1 604 822-2592
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