Ed Casas (edc@ece.ubc.ca) Tue, 7 Nov 2000 20:33:03 -0800
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Date: Tue, 7 Nov 2000 20:33:03 -0800 From: Ed Casas <edc@ece.ubc.ca> Subject: Re: assignment 2 part 1> What are we suppose to hand in for our part one? The VHDL code and the simulation output for the parts listed in the assignment. The code should be commented as per the instructions on the Web page: http://casas.ece.ubc.ca/379/documentation.html In this case you can skip the block diagrams as I've already given them to you, but you should comment the VHDL code in a manner similar to that described for assembly language. A cover page and a staple would probably be nice too. -- Ed Casas edc@ece.ubc.ca http://casas.ece.ubc.ca +1 604 822-2592
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