Ed Casas (edc@ece.ubc.ca) Sun, 17 Sep 2000 11:59:53 -0700
- Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]
- New Message to:eece379@listhost.ece.ubc.ca
- Reply to:Re: flex10k family
- Next message: Mehrnoush Sardashti: "lab problems"
- Previous message: aslau: "re: flex10k family"
Date: Sun, 17 Sep 2000 11:59:53 -0700 From: Ed Casas <edc@ece.ubc.ca> Subject: Re: flex10k familyAlex Lau said: > I think this is the case for all of us since EPF10KRC240-4 does > not exist in the program which leads me to believe that it is a > mistake in the lab instructions. The -3 and -4 suffixes on the part numbers refer to the propagation delay (in nanoseconds) through one of the FPGA's a logic blocks. As King Yung pointed out, the dialog boxes that display the different devices have an option to show only the highest speed parts for each devices (since faster parts are more expensive Altera stands to make more money if you use one of these :). Just uncheck the box and you'll see the other parts. Don't worry about this too much: the time between button pushes of the "clock" button won't come anywhere close to the minimum clock period of your device even if you synthesize for the -3 part and use a -4 part. And I don't think the device programmer actually checks the speed grade of the part it is programming. -- Ed Casas edc@ece.ubc.ca http://casas.ece.ubc.ca +1 604 822-2592
- Next message: Mehrnoush Sardashti: "lab problems"
- Previous message: aslau: "re: flex10k family"