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EECE 379 : Digital and Microcomputer System Design |
Instructor Office Hours Lectures and Tutorials Labs Assignments Teaching Assistants Web Page Mailing Lists Text References Evaluation Software Intended Audience Prerequisites Objectives Course Outline Related Courses |
InstructorEd Casas. Contact me by e-mail (edc@ece.ubc.ca) or come by my office in MCLD 451 (822-2592), preferably during office hours.Office HoursTBD.Lectures and TutorialsMonday, Wednesdays and Fridays, 8:30 to 9:20 AM in MCLD 402. Lectures begin January 5 and end April 5. Tutorials will cover new and important material and attendance is required.LabsLab ScheduleAlternate Thursdays, in MCLD 254. You must register through Telereg for one of the four sections. Sections A and B are from 11:30 to 2:30 while sections C and D are from 8:30 to 11:30. Lab sections A and C will start January 13. To switch lab sections you must first find someone willing to change into the section you are currently registered for (you can use the course mailing lists for this). Since there are (almost) no free lab spaces available you must show up for your scheduled lab period.The schedule is as follows: Lab Topic L2A/L2C Due L2B/L2D Due 1 Counter and LED Display Jan 13 Jan 27 Jan 20 Feb 3 2 LED Display (o/p port) Jan 27 Feb 10 Feb 3 Feb 24 3 Timer Peripheral (i/p port) Feb 10 Mar 2 Feb 24 Mar 9 4 Interrupt-Driven I/O Port Mar 2 Mar 16 Mar 9 Mar 23 5 to be decided Mar 16 Mar 30 Mar 23 Apr 6 Lab ProcedureLabs are to be done individually. Many students find that completing all of the labs is the most difficult part of this course.For most labs you will not have enough time to design, build and debug your circuit. Therefore, you must design and verify your solution (through simulation) before coming to the lab. You will be required to hand in the source code and correct simulation results before starting the lab. You must print out the revised source code (VHDL and/or assembler) and demonstrate your working design to the TA before the end of the lab session. The TA will then ask one or two questions about your program to make sure you understand the material. If did your own work you shouldn't have any problems answering the question(s). A short lab report must be handed in to the course assignment box (see below) before the start of your next lab on the due dates shown above. This report should include a brief description of your design, source code listings, schematics or block diagrams, and answers to any questions posed in the lab notes. Lab reports should be placed in the box marked "EECE 379 Assignments" outside MCLD 332. Lab MarkingEach lab will be marked out of 6 as follows:complete, simulated and correct pre-lab 1 a program and/or circuit that works properly 3 correct answers to questions after demo 1 accurate, complete and well-written report 1 Note: If a working circuit is not demonstrated by the end of the scheduled lab session you will receive a mark of zero for the second component (0/3). If the report is not handed in on time you will receive zero for the report (0/1). You must complete at least four of the five labs to pass the course. All five lab marks will count towards your final mark. PlagiarismEach student must submit an original solution. Possible penalties for plagiarism include a mark of zero for all labs.AssignmentsAssignment will be given out approximately once a week and will be due one week later. Solutions will be given out for all questions but not all questions will be marked. Late assignments will be given a mark of zero. Assignments should be placed in the box marked "ELEC 379 Assignments" outside MCLD 332 (not handed in during class).Assignments are to be done individually. Students are encouraged to seek help from classmates but copying is not allowed. Possible penalties for plagiarism include a mark of zero for all assignments. Bonus marks may be awarded for the fastest, the smallest and the most readable (as judged by the TA) designs submitted for each assignment. Teaching AssistantsZhurang (Dave) Zhao (zhurangz@ece.ubc.ca, MCLD 315) and Peter Hallschmid (peterh@ece.ubc.ca) will supervise the labs and Qing Wang (qingw@ece.ubc.ca) will mark the assignments.Web PageThe course Web page (http://www.ece.ubc.ca/~edc/379) will be used to make announcements and to distribute course material (e.g. data sheets). You can also use the Web page to check your marks and view the course mailing list archives. Any web browser can read these pages.The lecture notes, assignments, labs and solutions will be available from the Web page in PDF and other formats. Free software to view and print PDF documents (Ghostview, xpdf, Adobe Acrobat Reader) is available for most computers. Mailing ListThe lecturer will post important announcements about the course on the eece379-announce mailing list. All students in the course should subscribe to this mailing list.Students should post questions or answers about the course material to the eece379 mailing list. Instructions on subscribing are available on the course Web page. The mailing lists can also be accessed through the eece379-announce and eece379 archives. TextWe will not use a textbook in this course. Concepts will be explained in the lecture notes and we will use manufacturers' data sheets and standards documents as examples and reference material. I hope this will give you a better introduction to the design process than using a textbook.Detailed notes will be distributed before the relevant lecture. The notes will often contain exercises or sections to be completed during the lecture. Please wait until the end of the lecture before taking extra copies. You can always print copies from the course's Web page (see below). Other ReferencesThe lecture notes and Web references will cover the subset of digital logic design, VHDL and the 80x86 architecture that we will need. However, a number of textbooks and references are available if you would like to learn more:
EvaluationThere will be a 50-minute mid-term examination on Friday, February 23 from 8:30 to 9:20 PM and a 3-hour final exam in April. The final mark will be calculated as follows:final exam 49% midterm exam 20% assignments 10% labs 20% participation 1%You must also complete at least four of the five labs to pass the course. The participation mark will be awarded to students that ask or answer a non-trivial question on the course mailing list (please include your name when posting to the mailing lists). Changes to the marking scheme will require the agreement of the instructor and all of the students. SoftwareThe Altera MaxPlusII VHDL synthesis and simulation software will be available on the department's PC and Sun networks and you may also install it on your PC (MS-Windows 3.11, 95 or NT) if you wish.A free 80x86 assembler is available on the course Web page and on the department's PCs. Intended AudienceStudents who will design systems that include digital electronics.EECE 379 is designed for students in the Electrical Engineering rather than the Computer Engineering stream. The course covers the same material as a combination of EECE 353 (logic design) and EECE 465 (microcomputer design) but does not cover the material in as much depth. If you are in the computer engineering option you should probably take EECE 353 plus EECE 465 rather than this course. Ask your faculty advisor for more details. PrerequisitesStudent should have experience in designing simple digital circuits and in assembly-language programming.ObjectivesBy the end of the course the student should have the background required to begin designing microprocessor-based systems using programmable logic ICs. In general, the student should be able to:
Course OutlineThe course is structured in a bottom-up order: digital logic circuits, the processor bus, the system bus, and peripheral interfaces. As examples we will use Altera 10K FPGAs, the Intel 80386 CPU, the ISA/PC-104 and PCI system buses and RS-232 and SCSI peripheral interfaces.
Related CoursesThis course deals with the design of digital logic circuits, primarily those involving microprocessors. Related topics that are not covered in this course include:
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