My interests are FPGA architecture, CAD, VLSI circuit design, and deep submicron effects such as powergrid and interconnect parasitics.

My research looked at the design and analysis of interconnects for FPGA architectures. It is based on uni-directional interconnect design and my goal is to determine how to design a switch driver that achieves maximum performance to endpoints, and improves delay to midpoints in an island-style FPGA.