00001
00021 #include "abc.h"
00022 #include "sim.h"
00023
00027
00028 static void Sim_SymmsCreateSquare( Sym_Man_t * p, unsigned * pPat );
00029 static void Sim_SymmsDeriveInfo( Sym_Man_t * p, unsigned * pPat, Abc_Obj_t * pNode, Vec_Ptr_t * vMatrsNonSym, int Output );
00030
00034
00046 void Sim_SymmsSimulate( Sym_Man_t * p, unsigned * pPat, Vec_Ptr_t * vMatrsNonSym )
00047 {
00048 Abc_Obj_t * pNode;
00049 int i, nPairsTotal, nPairsSym, nPairsNonSym;
00050 int clk;
00051
00052
00053 Sim_SymmsCreateSquare( p, pPat );
00054
00055 clk = clock();
00056 Vec_PtrForEachEntry( p->vNodes, pNode, i )
00057 {
00058
00059
00060 Sim_UtilSimulateNodeOne( pNode, p->vSim, p->nSimWords, 0 );
00061 }
00062 p->timeSim += clock() - clk;
00063
00064 clk = clock();
00065 Abc_NtkForEachCo( p->pNtk, pNode, i )
00066 {
00067 pNode = Abc_ObjFanin0(pNode);
00068
00069
00070 nPairsTotal = Vec_IntEntry(p->vPairsTotal, i);
00071 nPairsSym = Vec_IntEntry(p->vPairsSym, i);
00072 nPairsNonSym = Vec_IntEntry(p->vPairsNonSym,i);
00073 assert( nPairsTotal >= nPairsSym + nPairsNonSym );
00074 if ( nPairsTotal == nPairsSym + nPairsNonSym )
00075 continue;
00076 Sim_SymmsDeriveInfo( p, pPat, pNode, vMatrsNonSym, i );
00077 }
00078 p->timeMatr += clock() - clk;
00079 }
00080
00092 void Sim_SymmsCreateSquare( Sym_Man_t * p, unsigned * pPat )
00093 {
00094 unsigned * pSimInfo;
00095 Abc_Obj_t * pNode;
00096 int i, w;
00097
00098 Abc_NtkForEachCi( p->pNtk, pNode, i )
00099 {
00100 pSimInfo = Vec_PtrEntry( p->vSim, pNode->Id );
00101 if ( Sim_HasBit(pPat, i) )
00102 {
00103 for ( w = 0; w < p->nSimWords; w++ )
00104 pSimInfo[w] = SIM_MASK_FULL;
00105 }
00106 else
00107 {
00108 for ( w = 0; w < p->nSimWords; w++ )
00109 pSimInfo[w] = 0;
00110 }
00111
00112 Sim_XorBit( pSimInfo, i );
00113 }
00114 }
00115
00127 void Sim_SymmsDeriveInfo( Sym_Man_t * p, unsigned * pPat, Abc_Obj_t * pNode, Vec_Ptr_t * vMatrsNonSym, int Output )
00128 {
00129 Extra_BitMat_t * pMat;
00130 Vec_Int_t * vSupport;
00131 unsigned * pSupport;
00132 unsigned * pSimInfo;
00133 int i, w, Index;
00134
00135 pMat = Vec_PtrEntry( vMatrsNonSym, Output );
00136 vSupport = Vec_VecEntry( p->vSupports, Output );
00137 pSupport = Vec_PtrEntry( p->vSuppFun, Output );
00138 pSimInfo = Vec_PtrEntry( p->vSim, pNode->Id );
00139
00140 for ( w = 0; w < p->nSimWords; w++ )
00141 {
00142 p->uPatCol[w] = pSupport[w] & pPat[w] & pSimInfo[w];
00143 p->uPatRow[w] = pSupport[w] & pPat[w] & ~pSimInfo[w];
00144 }
00145
00146 Vec_IntForEachEntry( vSupport, i, Index )
00147 if ( Sim_HasBit( p->uPatCol, i ) )
00148 Extra_BitMatrixOr( pMat, i, p->uPatRow );
00149
00150 Vec_IntForEachEntry( vSupport, i, Index )
00151 if ( Sim_HasBit( p->uPatRow, i ) )
00152 Extra_BitMatrixOr( pMat, i, p->uPatCol );
00153
00154 for ( w = 0; w < p->nSimWords; w++ )
00155 {
00156 p->uPatCol[w] = pSupport[w] & ~pPat[w] & pSimInfo[w];
00157 p->uPatRow[w] = pSupport[w] & ~pPat[w] & ~pSimInfo[w];
00158 }
00159
00160 Vec_IntForEachEntry( vSupport, i, Index )
00161 if ( Sim_HasBit( p->uPatCol, i ) )
00162 Extra_BitMatrixOr( pMat, i, p->uPatRow );
00163
00164 Vec_IntForEachEntry( vSupport, i, Index )
00165 if ( Sim_HasBit( p->uPatRow, i ) )
00166 Extra_BitMatrixOr( pMat, i, p->uPatCol );
00167 }
00168
00172
00173