Marking of Assignment 3

Two (2) marks were awarded for the VHDL file:

• 1 mark for any VHDL code at all
• 1 mark if the VHDL code included comments including name, student number, date, and assignment.

• 1 mark for any .bit file
• 1 mark for a .bit file that loads (no error messages from xchecker)
• 1 mark if the FPGA manages to turn on any LEDs at all
• 1 mark if the display changes each time the button is pushed
• 1 mark if it cycles through 9 states including a blank display
• 1 mark if it actually displays the student's own student number