Marking of Assignment 1
Question 1 was marked.
Marks were awarded for the following:
- comments: name/purpose/course/date (1 mark)
- entity name matches student's name (1 mark)
- port names match data sheet (a,b,c,d,s,y,w, either case) (1 mark)
- correct port types (bit and bit_vector) (1 mark)
- an architecture of any type (1 mark)
- an architecture with one or more processes sensitive to
a,b,c,d and s [wait statements instead of sensitivity lists
are are OK] (1 mark)
- a schematic of any type (1 mark)
- an optimized schematic (with technology:class) (1 mark)
- a schematic that doesn't have any flip-flops (1 mark)
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